Technical Library | 2023-11-20 18:10:20.0
The electronics production is prone to a multitude of possible failures along the production process. Therefore, the manufacturing process of surface-mounted electronics devices (SMD) includes visual quality inspection processes for defect detection. The detection of certain error patterns like solder voids and head in pillow defects require radioscopic inspection. These high-end inspection machines, like the X-ray inspection, rely on static checking routines, programmed manually by the expert user of the machine, to verify the quality. The utilization of the implicit knowledge of domain expert(s), based on soldering guidelines, allows the evaluation of the quality. The distinctive dependence on the individual qualification significantly influences false call rates of the inbuilt computer vision routines. In this contribution, we present a novel framework for the automatic solder joint classification based on Convolutional Neural Networks (CNN), flexibly reclassifying insufficient X-ray inspection results. We utilize existing deep learning network architectures for a region of interest detection on 2D grayscale images. The comparison with product-related meta-data ensures the presence of relevant areas and results in a subsequent classification based on a CNN. Subsequent data augmentation ensures sufficient input features. The results indicate a significant reduction of the false call rate compared to commercial X-ray machines, combined with reduced product-related optimization iterations.
Technical Library | 2014-08-19 15:39:13.0
Understanding warpage of package attach locations on PCBs under reflow temperature conditions is critical in surface mount technology. A new industry standard, IPC 9641, addresses this topic directly for the first time as an international standard.This paper begins by summarizing the sections of the IPC 9641 standard, including, measurement equipment selection, test setup and methodology, and accuracy verification. The paper goes further to discuss practical implementation of the IPC 9641 standards. Key advantages and disadvantages between available warpage measurement methods are highlighted. Choosing the correct measurement technique depends on requirements for warpage resolution, data density, measurement volume, and data correlation. From industry experience, best practice recommendations are made on warpage management of PCB land areas, covering how to setup, run, analyze, and report on local area PCB warpage.The release of IPC 9641 shows that flatness over temperature of the package land area on the PCB is critical to the SMT industry. Furthermore, compatibility of shapes between attaching surfaces in SMT, like a package and PCB, will be critical to product yield and quality in years to come.
Technical Library | 2009-11-18 23:37:52.0
Accurate component placement is a basic requirement for any pick and place machine. The first step towards accurate placement is accurate centering, or measurement of the component’s position on the placement head. One of the most widely used centering methods for ICs, connectors, and odd‐shaped components are a camera based system that measures the component position relative to a known point. Camera based centering systems include three main elements: lighting, camera, and software. Each of these elements are critical to obtaining an accurate measurement of the component and ultimately for accurate component placement on the PCB. As the old adage goes, the system is only as strong as its weakest link.
Technical Library | 2019-08-14 22:20:55.0
Cleanliness is a product of design, including component density, standoff height and the cleaning equipment’s ability to deliver the cleaning agent to the source of residue. The presence of manufacturing process soil, such as flux residue, incompletely activated flux, incompletely cured solder masks, debris from handling and processing fixtures, and incomplete removal of cleaning fluids can hinder the functional lifetime of the product. Contaminates trapped under a component are more problematic to failure. Advanced test methods are needed to obtain "objective evidence" for removing flux residues under leadless components.Cleaning process performance is a function of cleaning capacity and defined cleanliness. Cleaning performance can be influenced by the PCB design, cleaning material, cleaning machine, reflow conditions and a wide range of process parameters.This research project is designed to study visual flux residues trapped under the bottom termination of leadless components. This paper will research a non-destructive visual method that can be used to study the cleanability of solder pastes, cleaning material effectiveness for the soil, cleaning machine effectiveness and process parameters needed to render a clean part.
Technical Library | 2021-08-04 18:46:25.0
The process of printed circuit board assembly (PCBA) involves several machines, such as a stencil printer, placement machine and reflow oven, to solder and assemble electronic components onto printed circuit boards (PCBs). In the production flow, some failure prevention mechanisms are deployed to ensure the designated quality of PCBA, including solder paste inspection (SPI), automated optical inspection (AOI) and in-circuit testing (ICT). However, such methods to locate the failures are reactive in nature, which may create waste and require additional effort to be spent re-manufacturing and inspecting the PCBs. Worse still, the process performance of the assembly process cannot be guaranteed at a high level. Therefore, there is a need to improve the performance of the PCBA process. To address the aforementioned challenges in the PCBA process, an intelligent assembly process improvement system (IAPIS) is proposed, which integrates the k-means clustering method and multi-response Taguchi method to formulate a pro-active approach to investigate and manage the process performance.
Technical Library | 2015-09-23 22:08:32.0
A molded interconnect device (MID) is an injection molded thermoplastic substrate which incorporates a conductive circuit pattern and integrates both mechanical and electrical functions. (...) Flip chip bonding of bare die on MID can be employed to fully utilize MID’s advantage in device miniaturization. Compared to the traditional soldering process, thermo-compression bonding with gold stud bumps provides a clear advantage in its fine pitch capability. However, challenges also exist. Few studies have been made on thermocompression bonding on MID substrate, accordingly little information is available on process optimization, material compatibility and bonding reliability. Unlike solder reflow, there is no solder involved and no “self-alignment,” therefore the thermo-compression bonding process is significantly more dependent on the capability of the machine for chip assembly alignment.
Technical Library | 2019-07-02 23:02:05.0
The introduction of lead-free solders resulted in a selection of different chemistries for solder pastes. The higher melting points of lead-free alloys required thermal heat resistant rosin systems and activators that are active at elevated temperatures. As a result, more frequent maintenance of the filtration systems is required and machine downtime is increased.Last year a different method of cleaning reflow ovens was introduced. Instead of cooling down the process gasses to condensate the residues, a catalyst was used to maintain the clean oven. Catalytic thermal oxidation of residues in the nitrogen atmosphere resulted in cleaner heating zones. The residues were transformed into carbon dioxide. This remaining small amount of char was collected in the catalyst. In air ovens the catalyst was not seen as a beneficial option because the air extracted out of the oven was immediately exhausted into the environment. When a catalyst is used in an air environment there is not only the carbon dioxide residues, but also water. When a catalyst is used in an air reflow oven the question is where the water is going to. Will it condensate in the process part of the oven or is the gas temperature high enough to keep it out of the process area? A major benefit of using a catalyst to clean the air before it is exhausted into the environment is that the air pollution is reduced dramatically. This will make environmental engineers happy and result in less pollution of our nature. Apart from this, the exhaust tubes remain clean which reduces the maintenance of air ovens.This paper will give more detailed information of catalyst systems during development and performance in production lines.
Technical Library | 2018-09-26 20:33:26.0
Bottom terminated components, or BTCs, have been rapidly incorporated into PCB designs because of their low cost, small footprint and overall reliability. The combination of leadless terminations with underside ground/thermal pads have presented a multitude of challenges to PCB assemblers, including tilting, poor solder fillet formation, difficult inspection and – most notably – center pad voiding. Voids in large SMT solder joints can be difficult to predict and control due to the variety of input variables that can influence their formation. Solder paste chemistries, PCB final finishes, and reflow profiles and atmospheres have all been scrutinized, and their effects well documented. Additionally, many of the published center pad voiding studies have focused on optimizing center pad footprint and stencil aperture designs. This study focuses on I/O pad stencil modifications rather than center pad modifications. It shows a no-cost, easily implemented I/O design guideline that can be deployed to consistently and repeatedly reduce void formation on BTC-style packages.
Technical Library | 2024-07-24 01:04:35.0
Quad Flat No Leads (QFN) package designs receive more and more attention in electronic industry recently. This package offers a number of benefits including (1) small size, such as a near die size footprint, thin profile, and light weight; (2) easy PCB trace routing due to the use of perimeter I/O pads; (3) reduced lead inductance; and (4) good thermal and electrical performance due to the adoption of exposed copper die-pad technology. These features make the QFN an ideal choice for many new applications where size, weight, electrical, and thermal properties are important. However, adoption of QFN often runs into voiding issue at SMT assembly. Upon reflow, outgassing of solder paste flux at the large thermal pad has difficulty escaping and inevitably results in voiding. It is well known that the presence of voids will affect the mechanical properties of joints and deteriorate the strength, ductility, creep, and fatigue life. In addition, voids could also produce spot overheating, lessening the reliability of the joints.
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