Technical Library: solder and a (Page 12 of 60)

A Room Temperature Stable and Jetable Solder Joint Encapsulant Adhesive - Capillary Underfill Replacement

Technical Library | 2016-01-12 11:07:56.0

With the increasing demand of device miniaturization, high speed, more memory, more function, low cost, and more flexibility in device design and manufacturing chain, YINCAE has published a white paper on a first individual solder joint encapsulant which can eliminate underfilling process with at least five times solder joint increase and provide more flexibility for fine pitch and high density application. In order to meet the demand of manufacturing of high speed and low cost, YINCAE has invented a room temperature stable and jettable solder joint encapsulant adhesive – SMT 266. The invention of SMT 266 has allowed our customers to have more flexibility in their high-speed production line such as worry free on the work life of adhesive and workable jetting process.

YINCAE Advanced Materials, LLC.

Study on the Reliability of Sn–Bi Composite Solder Pastes with Thermosetting Epoxy under Thermal Cycling and Humidity Treatment

Technical Library | 2021-08-25 16:28:36.0

In this study, a Sn–Bi composite solder paste with thermosetting epoxy (TSEP Sn–Bi) was prepared by mixing Sn–Bi solder powder, flux, and epoxy system. The melting characteristics of the Sn–Bi solder alloy and the curing reaction of the epoxy system were measured by differential scanning calorimeter (DSC). A reflow profile was optimized based on the Sn–Bi reflow profile, and the Organic Solderability Preservative (OSP) Cu pad mounted 0603 chip resistor was chosen to reflow soldering and to prepare samples of the corresponding joint. The high temperature and humidity reliability of the solder joints at 85 #14;C/85% RH (Relative Humidity) for 1000 h and the thermal cycle reliability of the solder joints from

Nanjing University

Reflow Soldering Processes and Troubleshooting: SMT, BGA, CSP and Flip Chip Technologies

Technical Library | 2021-01-03 19:24:52.0

Reflow soldering is the primary method for interconnecting surface mount technology (SMT) applications. Successful implementation of this process depends on whether a low defect rate can be achieved. In general, defects often can be attributed to causes rooted in all three aspects, including materials, processes, and designs. Troubleshooting of reflow soldering requires identification and elimination of root causes. Where correcting these causes may be beyond the reach of manufacturers, further optimizing the other relevant factors becomes the next best option in order to minimize the defect rate.

Indium Corporation

Going Lead Free With Vapor Phase Soldering - Lead Free Is Still a Challenge For Major Industries.

Technical Library | 2014-01-30 18:08:04.0

As of today, the electronic industry is aware of the requirements for their products to be lead free. All components are typically available in lead free quality. This comprises packages like BGAs with BGA solder balls to PCB board finishes like HASL. The suppliers are providing everything that is needed. It is harder to get the old tin leaded (SnPb) components for new applications today, than lead free ones. So why has not everybody changed over fully yet and how can the challenges be overcome? A big concern in this transition process is reflow soldering. The process temperatures for lead free applications became much higher. Related with this is more stress for all the components. It affects the quality and reliability of the electronic units and products...

IBL - Löttechnik GmbH

Rosin Resins Solution for Soldering Industry

Technical Library | 2018-10-26 04:23:59.0

A product whitepaper of modified resins for soldering industry.

Foreverest Resources Ltd.

SnCu Based Alloy Design for Lower Copper Dissolution and Better Process Control

Technical Library | 2009-02-13 12:29:39.0

To meet the market demand for a best-in-class, low-cost leadfree alloy for wave, selective and dip soldering

Kester

Facedown Low-Inductance Solder Pad and Via Schemes

Technical Library | 2008-09-04 17:57:24.0

In the quest for lower ESL devices, having the ESL reduced in the package is only half of the battle; connecting that device to the circuit determines how much of that low ESL appears to the circuit. For this low ESL part type, it would be a shame to take a part of 200 pH and add 2000 pH to its ESL because of via patterns on the PCB.

KEMET Electronics Corporation

Laser-Based Methodology for the Application of Glass as a Dielectric and Cu Pattern Carrier for Printed Circuit Boards

Technical Library | 2018-11-07 20:48:01.0

Glass offers a number of advantages as a dielectric material, such as a low coefficient of thermal expansion (CTE), high dimensional stability, high thermal conductivity and suitable dielectric constant. These properties make glass an ideal candidate for, among other things, package substrate and high-frequency PCB applications. We report here a novel process for the production of printed circuit boards and integrated circuit packaging using glass as both a dielectric medium and a platform for wiring simultaneously.

Electro Scientific Industries

Development of a Consistent and Reliable Thermal Conductivity Measurement Method, Adapted to Typical Composite Materials Used in the PCB Industry

Technical Library | 2017-05-04 17:35:01.0

Most of today's printed circuit board base materials are anisotropic and it is not possible to use a simple method to measure thermal conductivity along the different axis, especially when a good accuracy is expected. Few base material suppliers' datasheet show X, Y and Z thermal conductivities. In most cases, a single value is given, moreover determined with a generic methodology, and not necessarily adapted to the reality of glass-reinforced composites with a strong anisotropy.After reminding of the fundamentals in thermal science, this paper gives an overview of the state-of the art in terms of thermal conductivity measurement on PCB base materials, and some typical values. It finally proposes an innovative method called transient fin method, and associated test sample, to perform reliable and consistent in plane thermal conductivity measurement on anisotropic PCB base materials.

CIMULEC

Stress Analysis and Optimization of a Flip Chip on Flex Electronic Packaging Method for Functional Electronic Textiles

Technical Library | 2020-12-24 02:50:56.0

A method for packaging integrated circuit silicon die in thin flexible circuits has been investigated that enables circuits to be subsequently integrated within textile yarns. This paper presents an investigation into the required materials and component dimensions in order to maximize the reliability of the packaging method. Two die sizes of 3.5 mm×8 mm× 0.53 mm and 2 mm×2 mm×0.1 mm have been simulated and evaluated experimentally under shear load and during bending. The shear and bending experimental results show good agreement with the simulation results and verify the simulated optimal thickness of the adhesive layer. Three underfill adhesives (EP30AO, EP37-3FLF, and Epo-Tek 301 2fl), three highly flexible adhesives (Loctite 4860, Loctite 480, and Loctite 4902), and three substrates (Kapton,Mylar, and PEEK) have been evaluated, and the optimal thickness of each is found. The Kapton substrate, together with the EP37-3FLF adhesive, was identified as the best materials combination with the optimum underfill and substrate thickness identified as 0.05 mm.

University of Southampton


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