Technical Library | 2023-01-17 17:22:28.0
The impact of voiding on the solder joint integrity of ball grid arrays (BGAs)/chip scale packages (CSPs) can be a topic of lengthy and energetic discussion. Detailed industry investigations have shown that voids have little effect on solder joint integrity unless they fall into specific location/geometry configurations. These investigations have focused on thermal cycle testing at 0°C-100°C, which is typically used to evaluate commercial electronic products. This paper documents an investigation to determine the impact of voids in BGA and CSP components using thermal cycle testing (-55°C to +125°C) in accordance with the IPC- 9701 specification for tin/lead solder alloys. This temperature range is more typical of military and other high performance product use environments. A proposed BGA void requirement revision for the IPC-JSTD-001 specification will be extracted from the results analysis.
Technical Library | 2023-01-17 17:27:13.0
Reflow profile has significant impact on solder joint performance because it influences wetting and microstructure of the solder joint. The degree of wetting, the microstructure (in particular the intermetallic layer), and the inherent strength of the solder all factor into the reliability of the solder joint. This paper presents experimental results on the effect of reflow profile on both 63%Sn 37%Pb (SnPb) and 96.5%Sn 3.0%Ag 0.5%Cu (SAC 305) solder joint shear force. Specifically, the effect of the reflow peak temperature and time above solder liquidus temperature are studied. Nine reflow profiles for SAC 305 and nine reflow profiles for SnPb have been developed with three levels of peak temperature (230 o C, 240 o C, and 250 o C for SAC 305; and 195 o C, 205 o C, and 215 o C for SnPb) and three levels of time above solder liquidus temperature (30 sec., 60 sec., and 90 sec.). The shear force data of four different sizes of chip resistors (1206, 0805, 0603, and 0402) are compared across the different profiles. The shear force of the resistors is measured at time 0 (right after assembly). The fracture surfaces have been studied using a scanning electron microscopy (SEM) with energy dispersive spectroscopy (EDS)
Technical Library | 2023-09-18 03:06:18.0
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Technical Library | 2007-02-01 09:36:26.0
Purpose: Compare the Surface Insulation Resistance of reworked BGA Test samples made with standard solder balls using a flux only reattachment and samples made including the StencilQuik™ product from Best Inc. with solder balls using a flux only reattachment.
Technical Library | 2007-02-01 10:08:40.0
The increased replacement of high lead count SMT devices with BGAs and other high ball count area array packages has brought increased challenges to PCB rework and repair. Often solder mask areas surrounding BGA pad areas are damaged when components are removed.
Technical Library | 2007-02-01 09:57:15.0
The rapid assimilation of Ball Grid Array (BGA) and other Area Array Package technology in the electronics industry is due to the fact that this package type allows for a greater I/O count in a smaller area while maintaining a pitch that allows for ease of manufacture.
Technical Library | 2007-06-21 17:03:16.0
The rapid assimilation of Ball Grid Array (BGA) and other Area Array Package technology in the electronics industry is due to the fact that this package type allows for a greater I/O count in a smaller area while maintaining a pitch that allows for ease of manufacture (...) While there have been several studies comparing these two attachment methods, this study highlights the effect of rework technique on the electrical characteristics and reliability of reworked BGAs.
Technical Library | 2007-01-31 15:17:04.0
The goal of this project is to evaluate the reliability of lead-free BGA solder joints with a variety of different pad sizes using several different BGA rework methods. These methods included BGAs reworked with both flux only and solder paste attachment techniques and with or without the use of the BEST stay in place StencilQuick™. The daisy chained test boards were placed into a thermal test chamber and cycled between -25ºC to 125ºC over a 30 minute cycle with a 30 minute dwell on each end of the cycle. Each BGA on the board was wired and the continuity assessed during the 1000 cycles the test samples were in the chamber.
Technical Library | 2013-07-03 10:31:54.0
It has been demonstrated in numerous pieces of work that stencil printing, one of the most complex PCB assembly processes, is one of the largest contributors to defects (Revelino et el). This complexity extends to prototype builds where a small number of boards need to be assembled quickly and reliably. Stencil printing is becoming increasingly challenging as packages shrink in size, increase in lead count and require closer lead spacing (finer pitch). Prototype SMT assembly can be further divided between industrial and commercial work and the DIYer, hobbyist or researcher groups. This second group is highly price sensitive when it comes to the materials used for the board assembly as their funds are sourced from personal or research monies as opposed to company funds. This has led to development of a lower cost SMT printing stencil made from plastic film as opposed to the more traditional stainless steel stencil used by industrial and commercial users.This study compares the performance of these two traditional materials and their respective impact on solder paste printing including efficiency and print quality.
Technical Library | 2015-12-31 15:19:28.0
Today's consumer electronic product are characterized by miniatuization, portability and light weight with high performance, especially for 3G mobile products. In the future more fine pitch CSPs (0.4mm) component will be required. However, the product reliability has been a big challenge with the fine pitch CSP. Firstly, the fine pitch CSPs are with smaller solder balls of 0.25mm diameter or even smaller. The small solder ball and pad size do weaken the solder connection and the adhesion of the pad and substrate, thus the pad will peel off easily from the PCB substrate. In addition, miniature solder joint reduce the strength during mechanical vibration, thermal shock, fatigue failure, etc. Secondly, applying sufficient solder paste evenly on the small pad of the CSP is difficult because stencil opening is only 0.25mm or less. This issue can be solved using the high end type of stencil such as Electroforming which will increase the cost.