Technical Library | 1999-05-07 10:47:00.0
White residue remaining after cleaning circuit board assemblies can be caused by a variety of chemicals and reactions. Rosin and water-soluble fluxes, circuit board resins and epoxies, component materials and other contamination all contribute to this complex chemistry. This paper discusses many of the sources of the residues that seem to be an ever-increasing occurrence.
Technical Library | 2016-01-12 11:05:28.0
The electronic industry is currently very interested in low temperature soldering processes such as using Sn/Bi alloy to improve process yield, eliminate the head-in-pillow effect, and enhance rework yield. However, Sn/Bi alloy is not strong enough to replace lead-free (SAC) and eutectic Sn/Pb alloys in most applications. In order to improve the strength of Sn/Bi solder joints, enhance mechanical performance, and improve reliability properties such as thermal cycling performance of soldered electronic devices, YINCAE has developed a low temperature solder joint encapsulant for Sn/Bi soldering applications. This low temperature solder joint encapsulant can be dipped, dispensed, or printed. After reflow with Sn/Bi solder paste or alloy, solder joint encapsulant encapsulates the solder joint. As a result, the strength of solder joints is enhanced by several times, and thermal cycling performance is significantly improved. All details will be discussed in this paper.
Technical Library | 2022-12-05 16:28:06.0
The work evaluates the impact of latent heat (LH) absorbed or released by a solder alloy during melting or solidification, respectively, on changes of dimensions of materials surrounding of the solder alloy. Our sample comprises a small printed circuit board (PCB) with a blind via filled with lead-free alloy SAC305. Differential scanning calorimetry (DSC) was employed to obtain the amount of LH per mass and a thermomechanical analyzer was used to measure the thermally induced deformation. A plateau during melting and a peak during solidification were detected during the course of dimension change. The peak height reached 1.6 μm in the place of the heat source and 0.3 μm in the distance of 3 mm from the source. The data measured during solidification was compared to a numerical model based on the finite element method. An excellent quantitative agreement was observed which confirms that the transient expansion of PCB during cooling can be explained by the release of LH from the solder alloy during solidification. Our results have important implications for the design of PCB assemblies where the contribution of recalescence to thermal stress can lead to solder joint failure.
Technical Library | 2023-07-25 16:42:54.0
Printing solder paste for very small components like .3mm pitch CSP's and 01005 Chip Components is a challenge for the printing process when other larger components like RF shields, SMT Connectors, and large chip or resistor components are also present on the PCB. The smaller components require a stencil thickness typically of 3 mils (75u) to keep the Area Ratio greater than .55 for good paste transfer efficiency. The larger components require either more solder paste height or volume, thus a stencil thickness in the range of 4 to 5 mils (100 to 125u). This paper will explore two stencil solutions to solve this dilemma. The first is a "Two Print Stencil" option where the small component apertures are printed with a thin stencil and the larger components with a thicker stencil with relief pockets for the first print. Successful prints with Keep-Outs as small as 15 mils (400u) will be demonstrated. The second solution is a stencil technology that will provide good paste transfer efficiency for Area Ratio's below .5. In this case a thicker stencil can be utilized to print all components. Paste transfer results for several different stencil types including Laser-Cut Fine Grain stainless steel, Laser-Cut stainless steel with and w/o PTFE Teflon coating, AMTX E-FAB with and w/o PTFE coating for Area Ratios ranging from .4 up to .69.
Technical Library | 2020-11-24 23:12:27.0
In a lead-free reflow process, temperatures are higher, and materials use outgasses more than in a leaded reflow process. The trends toward higher density populated boards and more pin-in-paste technology also increase solder paste use. More components and more solder paste result in more outgassing of chemistry during the reflow process. Some assemblies report condensation of vapors when the cold printed circuit board enters the oven. Little is known about the interaction between these condensed materials in terms of the interaction between these condensed materials and the reliability of the assembly. Apart from the question of reliability, a printed circuit board contaminated with a small film of residues after reflow soldering is not desirable.
Technical Library | 2016-09-01 16:21:11.0
Sn3.0Ag0.5Cu (SAC305) is currently the most popular near eutectic lead-free alloy used in the manufacturing processes. Over the last several years, the price of silver has dramatically increased driving a desire for lower silver alloy alternatives. As a result, there is a significant increase in the number of alternative low/no silver lead-free solder alloys available in the industry recently. Our previous study showed that many alternative low silver solder paste materials had good printing and wetting performance as compared to SAC305 solder pastes. However, there is lack of information on the reliability of alternative alloy solder joints assembled using alternative low silver alloy solder pastes.In this paper, we will present the reliability study of lead-free solder joints reflowed using various lead-free alloy solder pastes after thermal cycling test (3000 cycles, 0°C to 100°C). Six different lead-free pastes were investigated. SAC305 solder joints were used as the control. Low and no silver solder pastes and a low temperature SnBiAg solder pastes were also included.
Technical Library | 2023-07-25 16:25:56.0
This paper address two significant applications of stencils in advance packaging field: 1. Ultra-Thin stencils for miniature component (0201m) assembly; 2. Deep Cavity stencils for embedded (open cavity) packaging. As the world of electronics continues to evolve with focus on smaller, lighter, faster, and feature-enhanced high- performing electronic products, so are the requirement for complex stencils to assemble such components. These stencil thicknesses start from less than 25um with apertures as small as 60um (or less). Step stencils are used when varying stencil thicknesses are required to print into cavities or on elevated surfaces or to provide relief for certain features on a board. In the early days of SMT assembly, step stencils were used to reduce the stencil thickness for 25 mil pitch leaded device apertures. Thick metal stencils that have both relief-etch pockets and reservoir step pockets are very useful for paste reservoir printing. Electroform Step-Up Stencils for ceramic BGA's and RF Shields are a good solution to achieve additional solder paste height on the pads of these components as well as providing exceptional paste transfer for smaller components like uBGAs and 0201s. As the components are getting smaller, for example 0201m, or as the available real estate for component placement on a board is getting smaller – finer is the aperture size and the pitch on the stencils. Aggressive distances from step wall to aperture are also required. Ultra-thin stencils with thicknesses in the order of 15um-40um with steps of 15um are used to obtain desired print volumes. Stencils with thickness to this order can be potential tools even to print for RDLs in the package.
Technical Library | 2016-10-20 18:13:34.0
Pad cratering failure has emerged due to the transition from traditional SnPb to SnAgCu alloys in soldering of printed circuit assemblies. Pb-free-compatible laminate materials in the printed circuit board tend to fracture under ball grid array pads when subjected to high strain mechanical loads. In this study, two Pb-free-compatible laminates were tested, plus one dicycure non-Pb-free-compatible as control. One set of these samples were as-received and another was subjected to five reflows. It is assumed that mechanical properties of different materials have an influence on the susceptibility of laminates to fracture. However, the pad cratering phenomenon occurs at the layer of resin between the exterior copper and the first glass in the weave. Bulk mechanical properties have not been a good indicator of pad crater susceptibility. In this study, mechanical characterization of hardness and Young’s modulus was carried out in the critical area where pad cratering occurs using nano-indentation at the surface and in a cross-section. The measurements show higher modulus and hardness in the Pb-free compatible laminates than in the dicy-cured laminate. Few changes are seen after reflow – which is known to have an effect -- indicating that these properties do not provide a complete prediction. Measurements of the copper pad showed significant material property changes after reflow.
Technical Library | 2021-10-20 18:21:06.0
The solderability of the SAC305 alloy in contact with printed circuit boards (PCB) having different surface finishes was examined using the wetting balance method. The study was performed at a temperature of 260 _C on three types of PCBs covered with (1) hot air solder leveling (HASL LF), (2) electroless nickel immersion gold (ENIG), and (3) organic surface protectant (OSP), organic finish, all on Cu substrates and two types of fluxes (EF2202 and RF800). The results showed that the PCB substrate surface finish has a strong effect on the value of both the wetting time t0 and the contact angle h. The shortest wetting time was noted for the OSP finish (t0 = 0.6 s with EF2202 flux and t0 = 0.98 s with RF800 flux), while the ENIG finish showed the longest wetting time (t0 = 1.36 s with EF2202 flux and t0 = 1.55 s with RF800 flux). The h values calculated from the wetting balance tests were as follows: the lowest h of 45_ was formed on HASL LF (EF2202 flux), the highest h of 63_ was noted on the OSP finish, while on the ENIG finish, it was 58_ (EF2202 flux). After the solderability tests, the interface characterization of cross-sectional samples was performed by means of scanning electron microscopy coupled with energy dispersive spectroscopy.
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