Technical Library: solder paste cookson electronics (Page 7 of 7)

Effects of Package Warpage on Head-in-Pillow Defect

Technical Library | 2017-07-06 15:50:17.0

Head-in-pillow (HiP) is a BGA defect which happens when solder balls and paste can't contact well during reflow soldering. Package warpage was one of the major reasons for HiP formation. In this paper, package warpage was measured and simulated. It was found that the package warpage was sensitive to the thickness of inside chips. A FEM method considering viscoelastic property of mold compound was introduced to simulate package warpage. The CTE mismatch was found contributes to more than 90% of the package warpage value when reflowing at the peak temperature. A method was introduced to measure the warpage threshold, which is the smallest warpage value that may lead to HiP. The results in different atmospheres showed that the warpage threshold was 50μm larger in N2 than that in air, suggesting that under N2 atmosphere the process window for HiP defects was larger than that under air, which agreed with the experiments.

Samsung Electronics

Effect Of Board Clamping System On Solder Paste Print Quality

Technical Library | 2010-05-06 18:46:29.0

Stencil printing technology has come a long way since the early 80’s when SMT process gained importance in the electronics packaging industry. In those early days, components were fairly large, making the board design and printing process relatively simple. The current trend in product miniaturization has led to smaller and more complex board designs. This has resulted into designs with maximum area utilization of the board space. It is not uncommon, especially for hand held devices, to find components only a few millimeters from the edge of the board. The board clamping systems used in the printing process have become a significant area of concern based on the current board design trend.

Speedline Technologies, Inc.

Low Temperature SMT Solder Evaluation

Technical Library | 2020-09-23 21:29:25.0

The electronics industry could benefit greatly from using a reliable, manufacturable, reduced temperature, SMT solder material (alloy-composition) which is cost competitive with traditional Sn3Ag0.5Cu (SAC305) solder. The many possible advantages and some disadvantages / challenges are discussed. Until recently, the use of Sn/Bi based materials has been investigated with negative consequences for high strain rate (drop-shock) applications and thus, these alloys have been avoided. Recent advances in alloy "doping" have opened the door to revisit Sn/Bi alloys as a possible alternative to SAC-305 for many applications. We tested the manufacturability and reliability of three low-temperature and one SAC-305 (used as a control) solder paste materials. Two of these materials are doped Sn/Bi/Ag and one is just Sn/Bi/Ag1%. We will discuss the tests and related results. And lastly, we will discuss the prospects, applications and possible implications (based on this evaluation) of these materials together with future actions.

Flextronics International

Addressing the Challenge of Head-In-Pillow Defects in Electronics Assembly

Technical Library | 2013-12-27 10:39:21.0

The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of Pb-free technologies, generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a Ball-Grid Array (BGA), Chip-Scale Package (CSP), or even a Package-On-Package (PoP) and is characterized as a process anomaly, where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross-section, it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and PWB or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply, process & material) of the head-in-pillow defects. It will thoroughly review these three issues and how they relate to result in head-in pillow defects. In addition, a head-in-pillow elimination plan will be presented with real life examples will be to illustrate these head-in-pillow solutions.

Indium Corporation

Stencil Print solutions for Advance Packaging Applications

Technical Library | 2023-07-25 16:25:56.0

This paper address two significant applications of stencils in advance packaging field: 1. Ultra-Thin stencils for miniature component (0201m) assembly; 2. Deep Cavity stencils for embedded (open cavity) packaging. As the world of electronics continues to evolve with focus on smaller, lighter, faster, and feature-enhanced high- performing electronic products, so are the requirement for complex stencils to assemble such components. These stencil thicknesses start from less than 25um with apertures as small as 60um (or less). Step stencils are used when varying stencil thicknesses are required to print into cavities or on elevated surfaces or to provide relief for certain features on a board. In the early days of SMT assembly, step stencils were used to reduce the stencil thickness for 25 mil pitch leaded device apertures. Thick metal stencils that have both relief-etch pockets and reservoir step pockets are very useful for paste reservoir printing. Electroform Step-Up Stencils for ceramic BGA's and RF Shields are a good solution to achieve additional solder paste height on the pads of these components as well as providing exceptional paste transfer for smaller components like uBGAs and 0201s. As the components are getting smaller, for example 0201m, or as the available real estate for component placement on a board is getting smaller – finer is the aperture size and the pitch on the stencils. Aggressive distances from step wall to aperture are also required. Ultra-thin stencils with thicknesses in the order of 15um-40um with steps of 15um are used to obtain desired print volumes. Stencils with thickness to this order can be potential tools even to print for RDLs in the package.

Photo Stencil LLC

An Intelligent Approach For Improving Printed Circuit Board Assembly Process Performance In Smart Manufacturing

Technical Library | 2021-08-04 18:46:25.0

The process of printed circuit board assembly (PCBA) involves several machines, such as a stencil printer, placement machine and reflow oven, to solder and assemble electronic components onto printed circuit boards (PCBs). In the production flow, some failure prevention mechanisms are deployed to ensure the designated quality of PCBA, including solder paste inspection (SPI), automated optical inspection (AOI) and in-circuit testing (ICT). However, such methods to locate the failures are reactive in nature, which may create waste and require additional effort to be spent re-manufacturing and inspecting the PCBs. Worse still, the process performance of the assembly process cannot be guaranteed at a high level. Therefore, there is a need to improve the performance of the PCBA process. To address the aforementioned challenges in the PCBA process, an intelligent assembly process improvement system (IAPIS) is proposed, which integrates the k-means clustering method and multi-response Taguchi method to formulate a pro-active approach to investigate and manage the process performance.

Hong Kong Polytechnic University [The]

Thermal Capabilities of Solder Masks and Other Coating Materials - How High Can We Go?

Technical Library | 2019-09-24 15:41:53.0

This paper focuses on three different coating material groups which were formulated to operate under high thermal stress and are applied at printed circuit board manufacturing level. While used for principally different applications, these coatings have in common that they can be key to a successful thermal management concept especially in e-mobility and lighting applications. The coatings consist of: Specialty (green transparent) liquid photoimageable solder masks (LPiSM) compatible with long-term thermal storage/stress in excess of 150°C. Combined with the appropriate high-temperature base material, and along with a suitable copper pre-treatment, these solder resists are capable of fulfilling higher thermal demands. In this context, long-term storage tests as well as temperature cycling tests were conducted. Moreover, the effect of various Cu pre-treatment methods on the adhesion of the solder masks was examined following 150, 175 and 200°C ageing processes. For this purpose, test panels were conditioned for 2000 hours at the respective temperatures and were submitted to a cross-cut test every 500 h. Within this test set-up, it was found that a multi-level chemical pre-treatment gives significantly better adhesion results, in particular at 175°C and 200°C, compared with a pre-treatment by brush or pumice brush. Also, breakdown voltage as well as tracking resistance were investigated. For an application in LED technology, the light reflectivity and white colour stability of the printed circuit board are of major importance, especially when high-power LEDs are used which can generate larger amounts of heat. For this reason, a very high coverage power and an intense white colour with high reflectivity values are essential for white solder masks. These "ultra-white" and largely non-yellowing LPiSM need to be able to withstand specific thermal loads, especially in combination with high-power LED lighting applications. The topic of thermal performance of coatings for electronics will also be discussed in view of printed heatsink paste (HSP) and thermal interface paste (TIP) coatings which are used for a growing number of applications. They are processed at the printed circuit board manufacturing level for thermal-coupling and heat-spreading purposes in various thermal management-sensitive fields, especially in the automotive and LED lighting industries. Besides giving an overview of the principle functionality, it will be discussed what makes these ceramic-filled epoxy- or silicone-based materials special compared to using "thermal greases" and "thermal pads" for heat dissipation purposes.

Lackwerke Peters GmbH + Co KG

Enabling High-Speed Printing Using Low-Cost Materials: Process Stability is Paramount

Technical Library | 2016-03-17 19:09:46.0

The rapid growth of electronic devices across the globe is driving manufacturers to enhance high-speed mass production techniques in the PCB assembly arena. As manufacturers drive to reduce costs while maximizing production by expanding facilities, updating automation equipment, or implementing lean six sigma techniques, the potential to build scrap product or rework printed circuit boards increases dramatically.Manufacturers have two general paths to reduce the costs of high-speed printed circuit board assembly production. The first path is to reduce cost by focusing on high quality printing and mounting. The other, increasingly popular option is to utilize low-cost materials. In either case, the baseline must provide a consistent high-speed solder paste printing method, which considers the fill, snap-off, and cleaning processes.Building on our expertise and testing, this paper will highlight the two trains of thought with specific focus on how low-cost materials affect print performance. It will also explore technologies, which can help provide stable, high-speed screen printing.

Panasonic Factory Solutions Company of America (PFSA)

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Nordson Electronics Solutions
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