Technical Library | 2021-07-06 21:13:36.0
The surface finishes commonly used on printed circuit boards (PCBs) have an effect on solder paste performance in the surface mount process. Some surface finishes are non-planar like hot air solder level (HASL) which can lead to inconsistencies in solder paste printing. Other surface finishes are difficult to wet during reflow like organic solderability preservative (OSP). What is the overall effect of surface finish on solder paste performance? Which solder paste is best for each surface finish? It is the goal of this paper to answer these questions.
Technical Library | 2023-07-25 16:25:56.0
This paper address two significant applications of stencils in advance packaging field: 1. Ultra-Thin stencils for miniature component (0201m) assembly; 2. Deep Cavity stencils for embedded (open cavity) packaging. As the world of electronics continues to evolve with focus on smaller, lighter, faster, and feature-enhanced high- performing electronic products, so are the requirement for complex stencils to assemble such components. These stencil thicknesses start from less than 25um with apertures as small as 60um (or less). Step stencils are used when varying stencil thicknesses are required to print into cavities or on elevated surfaces or to provide relief for certain features on a board. In the early days of SMT assembly, step stencils were used to reduce the stencil thickness for 25 mil pitch leaded device apertures. Thick metal stencils that have both relief-etch pockets and reservoir step pockets are very useful for paste reservoir printing. Electroform Step-Up Stencils for ceramic BGA's and RF Shields are a good solution to achieve additional solder paste height on the pads of these components as well as providing exceptional paste transfer for smaller components like uBGAs and 0201s. As the components are getting smaller, for example 0201m, or as the available real estate for component placement on a board is getting smaller – finer is the aperture size and the pitch on the stencils. Aggressive distances from step wall to aperture are also required. Ultra-thin stencils with thicknesses in the order of 15um-40um with steps of 15um are used to obtain desired print volumes. Stencils with thickness to this order can be potential tools even to print for RDLs in the package.
Technical Library | 2020-10-27 02:02:17.0
Solder powder size is a popular topic in the electronics industry due to the continuing trend of miniaturization of electronics. The question commonly asked is "when should we switch from Type 3 to a smaller solder powder?" Solder powder size is usually chosen based on the printing requirements for the solder paste. It is common practice to use IPC Type 4 or 5 solder powders for stencil designs that include area ratios below the recommended IPC limit of 0.66. The effects of solder powder size on printability of solder paste have been well documented. The size of the solder powder affects the performance of the solder paste in other ways. Shelf life, stencil life, reflow performance, voiding behavior, and reactivity / stability are all affected by solder powder size. Testing was conducted to measure each of these solder paste performance attributes for IPC Type 3, Type 4, Type 5 and Type 6 SAC305 solder powders in both water soluble and no clean solder pastes. The performance data for each size of solder powder in each solder paste flux was quantified and summarized. Guidance for choosing the optimal size of solder powder is given based on the results of this study.
Technical Library | 2016-11-30 21:30:50.0
Mid-chip solder balling is a defect typically associated with solder paste exhibiting poor hot slump and/or insufficient wetting during the reflow soldering process, resulting in paste flowing under the component or onto the solder resist. Once molten, this solder is compressed and forced to the side of the component, causing mid-chip solder balling.This paper documents the experimental work performed to further understand the impact on mid-chip solder balling from both the manufacturing process and the flux chemistry.
Technical Library | 2017-02-09 17:08:44.0
The SMT assembly world, especially within the commercial electronics realm, is dominated by no-clean solder paste technology. A solder paste flux residue that does not require removal is very attractive in a competitive world where every penny of assembly cost counts. One important aspect of the reliability of assembled devices is the nature of the no-clean solder paste flux residue. Most people in this field understand the importance of having a process that renders the solder paste flux residue as benign and inert as possible, thereby ensuring electrical reliability.But, of all the factors that play into the electrical reliability of the solder paste flux residue, is there any impact made by the age of the solder paste and how it was stored? This paper uses J-STD-004B SIR (Surface Insulation Resistance) testing to examine this question.
Technical Library | 2007-09-06 11:03:33.0
EFD Inc. and Leister USA have collaborated to bust the myth that you cannot perform laser reflow with solder paste. Using Leister diode lasers, EFD has formulated solder pastes that survive the rapid reflow cycle typical of laser heating. These solder pastes reflow and wet well, without spatter, even when heating is accomplished in less than half a second. The flux core in wire solders cannot boast such flux spatter resistance in such an aggressive heating environment.
Technical Library | 1999-05-07 11:24:21.0
Many manufacturers have now completed the conversion to no clean solder paste. Many factors governed this initial conversion, among those being cosmetics, solder ability, and process ability. In circuit testing or probing through no clean solder paste residues has topically not been a major factor in the conversion decision for several reasons. Due to board design, solder paste was only used on one side of the board and not subjected to testing...
Technical Library | 2014-06-05 16:44:07.0
Stencil printing capability is becoming more important as the range of component sizes assembled on a single board increases. Coupled with increased component density, solder paste sticking to the aperture sidewalls and bottom of the stencil can cause insufficient solder paste deposits and solder bridging. Yield improvement requires increased focus on stencil technology, printer capability, solder paste functionality and understencil cleaning.(...) The purpose of this research is to study the wipe sequence, wipe frequency and wipe solvent(s) and how these factors interact to provide solder paste printing yield improvement.
Technical Library | 2007-01-03 16:36:58.0
Solder paste dispensing is not a new process. However, today's microelectronics present a daunting array of technical challenges to meet deposit size requirements. The need for better paste formulations, more precise equipment, and more tightly controlled processes is driving paste suppliers and equipment suppliers to develop new methods and materials. The most challenging solder paste deposits are those smaller than 0.25mm in diameter and today’s electronics demand such deposits. This paper addresses the process requirements for solder paste micro-deposits in terms of material, equipment and process variable control required for success in producing 0.25mm and smaller deposits.
Technical Library | 2013-03-12 13:25:18.0
High density and miniaturized circuit assemblies challenge the solder paste printing process. The use of small components such as 0201, 01005 and μBGA devices require good paste release to prevent solder paste bridging and misalignment. When placing these miniaturized components, taller paste deposits are often required. To improve solder paste deposition, a nano-coating is applied to laser cut stencils to improve transfer efficiency. One concern is the compatibility of the nano-coating with cleaning agents used in understencil wipe and stencil cleaning. The purpose of this research is to test the chemical compatibility of common cleaning agents used in understencil wipe and stencil cleaning processes.Compatibility of Cleaning Agents With Nano-Coated Stencils
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