Technical Library | 2012-10-25 16:34:02.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. This paper will examine stencil technologies (including Laser and Electroform), Aperture Wall coatings (including Nickel-Teflon coatings and Nano-coatings), and how these parameters influence paste transfer for miniature devices with Area Ratios less than the standard recommended lower limit of .5. A matrix of print tests will be utilized to compare paste transfer and measure the effectiveness of the different stencil configurations. Area Ratios ranging from .32 to .68 will be investigated.
Technical Library | 2021-11-16 22:17:27.0
Ultrasonics, coupled with an aqueous detergent process that cleans at below 43ºC, may be best suited for fine-pitch SMT screens and stencils. Aqueous detergents clean more effectively than solvents, with little or no environmental impact. Because of the environmental concerns driving today's technology decisions, the once simple decision of selecting a stencil cleaning process is now clouded with different chemicals, different cleaning machines and various types of solder paste, all with specific environmental, health and safety related issues and regulations.
Technical Library | 2023-06-12 19:46:10.0
Solder paste printing is understood to be the leading contributor of defects in the electronics assembly process. Because yield accounts for such a large percentage of the margin, the greatest opportunity to improve profitability in the assembly of most electronics can be gained by reducing or eliminating solder defects. This article examines process adjustments made through stencil design that correct a misalignment situation between the PCB and stencil, leading to a 43% reduction in assembly defects. Examples of each are found in Table 1.
Technical Library | 2023-06-12 19:00:21.0
The SMT print process is now very mature and well understood. However as consumers continually push for new electronic products, with increased functionality and smaller form factor, the boundaries of the whole assembly process are continually being challenged. Miniaturisation raises a number of issues for the stencil printing process. How small can we print? What are the tightest pitches? Can we print small deposits next too large for high mix technology assemblies? How closely can we place components for high density products? ...And then on top of this, how can we satisfy some of the cost pressures through the whole supply chain and improve yield in the production process! Today we are operating close to the limits of the stencil printing process. The area ratio rule (the relationship between stencil aperture opening and aperture surface area) fundamentally dictates what can and cannot be achieved in a print process. For next generation components and assembly processes these established rules need to be broken! New stencil printing techniques are becoming available which address some of these challenges. Active squeegees have been shown to push area ratio limits to new boundaries, permitting printing for next generation 0.3CSP technology. Results also indicate there are potential yield benefits for today's leading edge components as well. Stencil coatings are also showing promise. In tests performed to date it is becoming apparent that certain coatings can provide higher yield processing by extending the number of prints that can be performed in-between stencil cleans during a print process. Preliminary test results relating to the stencil coating technology and how they impact miniaturisation and high yield processing will be presented.
Technical Library | 2013-11-21 12:01:11.0
Previous experimentation on a highly miniaturized and densely populated SMT assembly revealed the optimum stencil alloy and flux-repellent coating for its stencil printing process. Production implementation of the materials that were identified in the study resulted in approximately 5% print yield improvement across all assemblies throughout the operation, validating the results of the initial tests. A new set of studies was launched to focus on the materials themselves, with the purpose of optimizing their performance on the assembly line (...) Results of the prior tests are reviewed, and the new test vehicle, experimental setup and results are presented and discussed.
Technical Library | 2011-12-08 17:46:42.0
The past few years have brought PCB assemblers a multitude of choices for SMT stencil materials and coatings. In addition to the traditional laser-cut stainless steel (SS) or electroformed nickel, choices now include SS that has been optimized for laser c
Technical Library | 2009-09-09 15:08:19.0
Stencil printing equipment has traditionally been used in the surface mount assembly industry for solder paste printing. In recent years the flexibility of the tool has been exploited for a wide range of materials and processes to aid semiconductor packaging and assembly. One such application has been the deposition of adhesive coatings onto the backside of silicon wafers.
Technical Library | 2007-12-13 17:03:02.0
Printer-hosted processes for solder ball placement are now widely used for package technologies ranging from BGAs using ball diameters above 750μm to the latest WL-CSPs demanding 250μm diameter. This broadening spectrum of applications brings more choices in terms of stencil design rules and production methodologies.
Technical Library | 1999-04-15 06:54:01.0
High-speed printing techniques are revealed that break the speed barrier resulting from air entrapment in large apertures at fast squeegee speeds. Adhesive printability test results using conventional thickness stencils to achieve a significant range of d
Technical Library | 2012-04-05 22:53:10.0
In this paper we show how hybrid control and modeling tech-niques can be put to work for solving a problem of industrial relevance in Surface Mount Technology (SMT) manufacturing. In particular, by closing the loop over the stencil printing process, we ob
