Technical Library | 2023-07-25 16:25:56.0
This paper address two significant applications of stencils in advance packaging field: 1. Ultra-Thin stencils for miniature component (0201m) assembly; 2. Deep Cavity stencils for embedded (open cavity) packaging. As the world of electronics continues to evolve with focus on smaller, lighter, faster, and feature-enhanced high- performing electronic products, so are the requirement for complex stencils to assemble such components. These stencil thicknesses start from less than 25um with apertures as small as 60um (or less). Step stencils are used when varying stencil thicknesses are required to print into cavities or on elevated surfaces or to provide relief for certain features on a board. In the early days of SMT assembly, step stencils were used to reduce the stencil thickness for 25 mil pitch leaded device apertures. Thick metal stencils that have both relief-etch pockets and reservoir step pockets are very useful for paste reservoir printing. Electroform Step-Up Stencils for ceramic BGA's and RF Shields are a good solution to achieve additional solder paste height on the pads of these components as well as providing exceptional paste transfer for smaller components like uBGAs and 0201s. As the components are getting smaller, for example 0201m, or as the available real estate for component placement on a board is getting smaller – finer is the aperture size and the pitch on the stencils. Aggressive distances from step wall to aperture are also required. Ultra-thin stencils with thicknesses in the order of 15um-40um with steps of 15um are used to obtain desired print volumes. Stencils with thickness to this order can be potential tools even to print for RDLs in the package.
Technical Library | 2014-03-13 15:25:01.0
A student competition paper at Budapest University of Technology And Economics, Department of Electronics Technology gives background, covers stencil design and discusses stencils intended for pin in paste application. The stencil applied for depositing the solder paste is a thin, 75–200 µm thick metal foil, on which apertures are formed according to the solder pads on the printed circuit board. Stencil printing provides a fast, mass solder paste deposition process; relatively expensive, appropriate and recommended for mass production.
Technical Library | 2015-08-25 13:51:27.0
The stencil printing process is one of the most critical processes in the electronic production. Due to the requirement: "faster and smaller" it is necessary to place components with different paste volume close together without regard to solder paste printing. In our days it is no longer possible to control the solder paste volume only by adjustment of the aperture dimensions. The requirements of solder paste volumes for specific components are realized by different thicknesses of metal sheets in one stencil with so called step stencils. The step-down stencil is required when it is desirable to print fine-pitch devices using a thinner stencil foil, but print other devices using a thicker stencil foil. The paper presents the innovative technology of step-up and step-down stencils in a laser cutting and laser welding process. The step-up/step-down stencil is a special development for the adjustment of solder paste quantity, fulfilling the needs of placement and soldering. This includes the laser cutting and laser welding process as well as the resulting stencil characteristics and the potential of the printing process.
Technical Library | 2023-07-25 16:42:54.0
Printing solder paste for very small components like .3mm pitch CSP's and 01005 Chip Components is a challenge for the printing process when other larger components like RF shields, SMT Connectors, and large chip or resistor components are also present on the PCB. The smaller components require a stencil thickness typically of 3 mils (75u) to keep the Area Ratio greater than .55 for good paste transfer efficiency. The larger components require either more solder paste height or volume, thus a stencil thickness in the range of 4 to 5 mils (100 to 125u). This paper will explore two stencil solutions to solve this dilemma. The first is a "Two Print Stencil" option where the small component apertures are printed with a thin stencil and the larger components with a thicker stencil with relief pockets for the first print. Successful prints with Keep-Outs as small as 15 mils (400u) will be demonstrated. The second solution is a stencil technology that will provide good paste transfer efficiency for Area Ratio's below .5. In this case a thicker stencil can be utilized to print all components. Paste transfer results for several different stencil types including Laser-Cut Fine Grain stainless steel, Laser-Cut stainless steel with and w/o PTFE Teflon coating, AMTX E-FAB with and w/o PTFE coating for Area Ratios ranging from .4 up to .69.
Technical Library | 2023-07-25 16:50:02.0
Some of the new handheld communication devices offer real challenges to the paste printing process. Normally, there are very small devices like 01005 chip components as well as 0.3 mm pitch uBGA along with other devices that require higher deposits of solder paste. Surface mount connectors or RF shields with coplanarity issues fall into this category. Aperture sizes for the small devices require a stencil thickness in the 50 to 75 um (2-3 mils) range for effective paste transfer whereas the RF shield and SMT connector would like at least 150 um (6 mils) paste height. Spacing is too small to use normal step stencils. This paper will explore a different type of step stencil for this application; a "Two-Print Stencil Process" step stencil. Here is a brief description of a "Two-Print Stencil Process". A 50 to 75 um (2-3 mils) stencil is used to print solder paste for the 01005, 0.3 mm pitch uBGA and other fine pitch components. While this paste is still wet a second in-line stencil printer is used to print all other components using a second thicker stencil. This second stencil has relief pockets on the contact side of the stencil any paste was printed with the first stencil. Design guidelines for minimum keep-out distances between the relief step, the fine pitch apertures, and the RF Shields apertures as well relief pocket height clearance of the paste printed by the first print stencil will be provided.
Technical Library | 2014-11-06 16:43:24.0
This paper summarizes the results of recent investigations to examine the effect of electroless nickel process variations with respect to Pb-free (Sn-3.0Ag-0.5Cu) solder connections. These investigations included both ENIG and NiPd as surface finishes intended for second level interconnects in BGA applications. Process variations that are suspected to weaken solder joint reliability, including treatment time and pH, were used to achieve differences in nickel layer composition. Immersion gold deposits were also varied, but were directly dependent upon the plated nickel characteristics. In contrast to gold, different electroless palladium thicknesses were independently achieved by treatment time adjustments.
Technical Library | 2020-09-23 21:37:25.0
The need to minimise thermal damage to components and laminates, to reduce warpage-induced defects to BGA packages, and to save energy, is driving the electronics industry towards lower process temperatures. For soldering processes the only way that temperatures can be substantially reduced is by using solders with lower melting points. Because of constraints of toxicity, cost and performance, the number of alloys that can be used for electronics assembly is limited and the best prospects appear to be those based around the eutectic in the Bi-Sn system, which has a melting point of about 139°C. Experience so far indicates that such Bi-Sn alloys do not have the mechanical properties and microstructural stability necessary to deliver the reliability required for the mounting of BGA packages. Options for improving mechanical properties with alloying additions that do not also push the process temperature back over 200°C are limited. An alternative approach that maintains a low process temperature is to form a hybrid joint with a conventional solder ball reflowed with a Bi-Sn alloy paste. During reflow there is mixing of the ball and paste alloys but it has been found that to achieve the best reliability a proportion of the ball alloy has to be retained in the joint, particular in the part of the joint that is subjected to maximum shear stress in service, which is usually the area near the component side. The challenge is then to find a reproducible method for controlling the fraction of the joint thickness that remains as the original solder ball alloy. Empirical evidence indicates that for a particular combination of ball and paste alloys and reflow temperature the extent to which the ball alloy is consumed by mixing with the paste alloy is dependent on the volume of paste deposited on the pad. If this promising method of achieving lower process temperatures is to be implemented in mass production without compromising reliability it would be necessary to have a method of ensuring the optimum proportion of ball alloy left in the joint after reflow can be consistently maintained. In this paper the author explains how the volume of low melting point alloy paste that delivers the optimum proportion of retained ball alloy for a particular reflow temperature can be determined by reference to the phase diagrams of the ball and paste alloys. The example presented is based on the equilibrium phase diagram of the binary Bi-Sn system but the method could be applied to any combination of ball and paste alloys for which at least a partial phase diagram is available or could be easily determined.
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