Technical Library: subassembly (Page 1 of 1)

New Approaches to Develop a Scalable 3D IC Assembly Method

Technical Library | 2016-08-11 15:49:59.0

The challenge for 3D IC assembly is how to manage warpage and thin wafer handling in order to achieve a high assembly yield and to ensure that the final structure can pass the specified reliability requirements. Our test vehicles have micro-bumped die having pitches ranging from 60um down to 30um. The high density of pads and the large die size, make it extremely challenging to ensure that all of the micro-bump interconnects are attached to a thin Si-interposer. In addition, the low standoff between the die and interposer make it difficult to underfill. A likely approach is to first attach the die to the interposer and then the die/interposer sub-assembly to the substrate. In this scenario, the die/interposer sub-assembly is comparable to a monolithic silicon die that can be flip chip attached to the substrate. In this paper, we will discuss various assembly options and the challenges posed by each. In this investigation, we will propose the best method to do 2.5D assembly in an OSAT(Outsourced Assembly and Test) facility.

Invensas Corporation

Component Obsolescence Still Driving the Counterfeit Market

Technical Library | 2013-04-12 07:31:31.0

As change is inevitable, therefore so is obsolescence. In the electronics sector, stocks of components used in subassemblies will eventually run out, no surprise there! However on many occasions, particularly in the often long product life cycles associated with the traditional UK OEM’s in the industrial, military and medical sectors, to name but three, component supply gets ‘difficult’ long before the customers products themselves reach their ‘end of life’. Component manufacturers work to a commercial agenda; when the popularity of a specific device wanes, or indeed when new features are demanded by the market, they will cease production and redeploy their manufacturing capacity to devices that are being demanded by their high volume customers; the global players.

Vigilant Components

Press Fit Technology Roadmap and Control Parameters for a High Performance Process

Technical Library | 2016-10-27 16:24:23.0

Press-fit technology is a proven and widely used and accepted interconnection method for joining electronics assemblies. Printed Circuit Board Assembly Systems and typical functional subassemblies are connected through press-fit connectors. The Press-Fit Compliant Pin is a proven interconnect termination to reliably provide electrical and mechanical connections from a Printed Circuit Board to an Electrical Connector. Electrical Connectors are then interconnected together providing board to board electrical and mechanical inter-connection. Press-Fit Compliant Pins are housed within Connectors and used on Backplanes, Mid-planes and Daughter Card Printed Circuit Board Assemblies. High reliability OEM (Original Equipment Manufacturer) computer designs continue to use press-fit connections to overcome challenges associated with soldering, rework, thermal cycles, installation and repair. This paper investigates the technical roadmap for press fit technology, putting special attention to main characteristics such, placement and insertion, inspection, repair, pin design trends, challenges and solutions. Critical process control parameters within an assembly manufacturing are highlighted.

Flex (Flextronics International)

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