Technical Library: test board (Page 4 of 13)

Avoidance of Ceramic-Substrate-Based LED Chip Cracking Induced by PCB Bending or Flexing

Technical Library | 2022-09-25 20:18:33.0

Printed circuit board (PCB) bending and/or flexing is an unavoidable phenomenon that is known to exist and is easily encountered during electronic board assembly processes. PCB bending and/or flexing is the fundamental source of tensile stress induced on the electronic components on the board assembly. For more brittle components, like ceramic-based electronic components, micro-cracks can be induced, which can eventually lead to a fatal failure of the components. For this reason, many standards organizations throughout the world specify the methods under which electronic board assemblies must be tested to ensure their robustness, sometimes as a pre-condition to more rigorous environmental tests such as thermal cycling or thermal shock.

Cree Lighting

Design For Test Considerations For PCB Design

Technical Library | 2006-07-14 11:48:11.0

The perennial question in electronics design and manufacture is: "How do I design a printed circuit board (PCB) so that it can be properly tested?" To achieve this objective, there are a number of design-for-test (DFT) considerations and techniques. Some are major, others, minor. However, the total contributes to a highly effective PCB design so that testing procedures applied to a given design result in high 90 percent plus test coverage.

NexLogic Tech, Inc.

Characterization of No Clean Solderpaste Residues: The Relationship to In-Circuit Testing

Technical Library | 1999-05-07 11:24:21.0

Many manufacturers have now completed the conversion to no clean solder paste. Many factors governed this initial conversion, among those being cosmetics, solder ability, and process ability. In circuit testing or probing through no clean solder paste residues has topically not been a major factor in the conversion decision for several reasons. Due to board design, solder paste was only used on one side of the board and not subjected to testing...

Kester

Test Plan for Automotive Electronic Circuit Board

Technical Library | 2021-08-23 01:53:13.0

After the equipment was introduced, the production capacity was increased by 20%, and the number of operators was reduced by 50%. Employees' salary expenses have been reduced by RMB 120,000 per year, and the pass-through rate has increased by 10% .

Shenzhen PTI Technology CO.,LTD

Latent short circuit failure in high-rel PCBs caused by lack of cleanliness of PCB processes and base materials

Technical Library | 2021-03-10 23:57:29.0

Latent short circuit failures have been observed during testing of Printed Circuit Boards (PCB) for power distribution of spacecraft of the European Space Agency. Root cause analysis indicates that foreign fibers may have contaminated the PCB laminate. These fibers can provide a pathway for electromigration if they bridge the clearance between nets of different potential in the presence of humidity attracted by the hygroscopic laminate resin. PCB manufacturers report poor yield caused by contamination embedded in laminate. Inspections show ...

European Space Agency

Reliability Testing For Microvias In Printed Wire Boards

Technical Library | 2021-01-21 02:04:27.0

Traditional single level microvia structures are generally considered the most robust type of interconnection within a printed wire board (PWB) substrate. The rapid implementation of HDI technology now commonly requires between 2, 3 or 4 levels of microvias sequentially processed into the product. Recent OEM funded reliability testing has confirmed that by increasing the levels (stack height) these structures are proving less reliable, when compared to their single or double level counterparts. Recently false positive results have been recorded on products tested with traditional thermal shock testing methodology (cycling between -40°C and 125°C, or 145°C). A number of companies are incurring product failures resulting in increased costs associated with replacing the circuit boards, components and added labour.

PWB Interconnect Solutions Inc.

Cracks: The Hidden Defect

Technical Library | 2019-08-15 13:31:52.0

Cracks in ceramic chip capacitors can be introduced at any process step during surface mount assembly. Thermal shock has become a "pat" answer for all of these cracks, but about 75 to 80% originate from other sources. These sources include pick and place machine centering jaws, vacuum pick up bit, board depanelization, unwarping boards after soldering, test fixtures, connector insulation, final assembly, as well as defective components. Each source has a unique signature in the type of crack that it develops so that each can be identified as the source of error.

AVX Corporation

Board-Level Thermal Cycling and Drop-Test Reliability of Large, Ultrathin Glass BGA Packages for Smart Mobile Applications

Technical Library | 2018-08-22 14:05:42.0

Glass substrates are emerging as a key alternative to silicon and conventional organic substrates for high-density and high-performance systems due to their outstanding dimensional stability, enabling sub-5-µm lithographic design rules, excellent electrical performance, and unique mechanical properties, key in achieving board-level reliability at body sizes larger than 15 × 15 mm2. This paper describes the first demonstration of the board-level reliability of such large, ultrathin glass ball grid array (BGA) packages directly mounted onto a system board, considering both their thermal cycling and drop-test performances.

Institute of Electrical and Electronics Engineers (IEEE)

Using Automated 3D X-Ray Inspection to Detect BTC Defects

Technical Library | 2013-07-25 14:02:15.0

Bottom-termination components (BTC), such as QFNs, are becoming more common in PCB assemblies. These components are characterized by hidden solder joints. How are defects on hidden DFN joints detected? Certainly, insufficient solder joints on BTCs cannot be detected by manual visual inspection. Nor can this type of defect be detected by automated optical inspection; the joint is hidden by the component body. Defects such as insufficients are often referred to as "marginal" defects because there is likely enough solder present to make contact between the termination on the bottom-side of the component and the board pad for the component to pass in-circuit and functional test. Should the board be subjected to shock or vibration, however, there is a good chance this solder connection will fracture, leading to an open connection.

Flex (Flextronics International)

Long Term Thermal Reliability of Printed Circuit Board Materials

Technical Library | 2016-09-15 17:10:40.0

This paper describes the purpose, methodology, and results to date of thermal endurance testing performed at the company. The intent of this thermal aging testing is to establish long term reliability data for printed wiring board (PWB) materials for use in applications that require 20+ years (100,000+ hours) of operational life under different thermal conditions. Underwriters Laboratory (UL) testing only addresses unclad laminate (resin and glass) and not a fabricated PWB that undergoes many processing steps, includes copper and plated through holes, and has a complex mechanical structure. UL testing is based on a 5000 hour expected operation life of the electronic product. Therefore, there is a need to determine the dielectric breakdown / degradation of the composite printed circuit board material and mechanical structure over time and temperature for mission critical applications.

Amphenol Printed Circuit Board Technology


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