Technical Library: testing (Page 6 of 35)

Creating Reusable Manufacturing Tests for High-Speed I/O with Synthetic Instruments

Technical Library | 2020-07-08 20:05:59.0

There is a compelling need for functional testing of high-speed input/output signals on circuit boards ranging from 1 gigabit per second (Gbps) to several hundred Gbps. While manufacturing tests such as Automatic Optical Inspection (AOI) and In-Circuit Test (ICT) are useful in identifying catastrophic defects, most high-speed signals require more scrutiny for failure modes that arise due to high-speed conditions, such as jitter. Functional ATE is seldom fast enough to measure high-speed signals and interpret results automatically. Additionally, to measure these adverse effects it is necessary to have the tester connections very close to the unit under test (UUT) as lead wires connecting the instruments can distort the signal. The solution we describe here involves the use of a field programmable gate array (FPGA) to implement the test instrument called a synthetic instrument (SI). SIs can be designed using VHDL or Verilog descriptions and "synthesized" into an FPGA. A variety of general-purpose instruments, such as signal generators, voltmeters, waveform analyzers can thus be synthesized, but the FPGA approach need not be limited to instruments with traditional instrument equivalents. Rather, more complex and peculiar test functions that pertain to high-speed I/O applications, such as bit error rate tests, SerDes tests, even USB 3.0 (running at 5 Gbps) protocol tests can be programmed and synthesized within an FPGA. By using specific-purpose test mechanisms for high-speed I/O the test engineer can reduce test development time. The synthetic instruments as well as the tests themselves can find applications in several UUTs. In some cases, the same test can be reused without any alteration. For example, a USB 3.0 bus is ubiquitous, and a test aimed at fault detection and diagnoses can be used as part of the test of any UUT that uses this bus. Additionally, parts of the test set may be reused for testing another high-speed I/O. It is reasonable to utilize some of the test routines used in a USB 3.0 test, in the development of a USB 3.1 (running at 10 Gbps), even if the latter has substantial differences in protocol. Many of the SI developed for one protocol can be reused as is, while other SIs may need to undergo modifications before reuse. The modifications will likely take less time and effort than starting from scratch. This paper illustrates an example of high-speed I/O testing, generalizes failure modes that are likely to occur in high-speed I/O, and offers a strategy for testing them with SIs within FPGAs. This strategy offers several advantages besides reusability, including tester proximity to the UUT, test modularization, standardization approaching an ATE-agnostic test development process, overcoming physical limitations of general-purpose test instruments, and utilization of specific-purpose test instruments. Additionally, test instrument obsolescence can be overcome by upgrading to ever-faster and larger FPGAs without losing any previously developed design effort. With SIs and tests scalable and upward compatible, the test engineer need not start test development for high-speed I/O from scratch, which will substantially reduce time and effort.

A.T.E. Solutions, Inc.

Design For Test Considerations For PCB Design

Technical Library | 2006-07-14 11:48:11.0

The perennial question in electronics design and manufacture is: "How do I design a printed circuit board (PCB) so that it can be properly tested?" To achieve this objective, there are a number of design-for-test (DFT) considerations and techniques. Some are major, others, minor. However, the total contributes to a highly effective PCB design so that testing procedures applied to a given design result in high 90 percent plus test coverage.

NexLogic Tech, Inc.

Early Design Review of Boundary Scan in Enhancing Testability and Optimization of Test Strategy

Technical Library | 2018-08-01 11:25:59.0

With complexities of PCB design scaling and manufacturing processes adopting to environmentally friendly practices raise challenges in ensuring structural quality of PCBs. This makes it essential to have a good 'Design for Test' (DFT) to ensure a robust structural test. (...)During the course of the DFT review, can we realize a good test strategy for the PCBA. How can the test strategy of the PCBA be partitioned as to what portions of the design can be covered structurally and what is covered functionally, in a way that provides best diagnostics to discover faults

Keysight Technologies

Process Control of Ionic Contamination Achieving 6-Sigma Criteria in The Assembly of Electronic Circuits

Technical Library | 2018-11-29 13:43:54.0

Ionic contamination testing as a process control tool a newly developed testing protocol based on IPC-TM 650 2.3.25, was established to enable monitoring of ionic contamination within series production. The testing procedure was successfully implemented within the production of high reliability, safety critical electronic circuits, involving multiple production sites around the world. I will be shown in this paper that the test protocol is capable for meeting Six-Sigma-Criteria.

Robert Bosch LLC Automotive Electronics Division

Investigation of Factors That Influence Creep Corrosion

Technical Library | 2021-04-08 00:36:50.0

Understand the sensitivities of the identified factors to Creep Corrosion. Correlate experimental test conditions to environment classification standards.

iNEMI (International Electronics Manufacturing Initiative)

Design for Testability (DFT) to Overcome Functional Board Test Complexities in Manufacturing Test

Technical Library | 2018-06-20 13:11:57.0

Manufacturers test to ensure that the product is built correctly. Shorts, opens, wrong or incorrectly inserted components, even catastrophically faulty components need to be flagged, found and repaired. When all such faults are removed, however, functional faults may still exist at normal operating speed, or even at lower speeds. Functional board test (FBT) is still required, a process that still relies on test engineers’ understanding of circuit functionality and manually developed test procedures. While functional automatic test equipment (ATE) has been reduced considerably in price, FBT test costs have not been arrested. In fact, FBT is a huge undertaking that can take several weeks or months of test engineering development, unacceptably stretching time to market. The alternative, of selling products that have not undergone comprehensive FBT is equally, if not more, intolerable.

A.T.E. Solutions, Inc.

Design for Testability (DFT) to Overcome Functional Board Test Complexities in Manufacturing Test

Technical Library | 2021-05-20 13:45:49.0

Manufacturers test to ensure that the product is built correctly. Shorts, opens, wrong or incorrectly inserted components, even catastrophically faulty components need to be flagged, found and repaired. When all such faults are removed, however, functional faults may still exist at normal operating speed, or even at lower speeds. Functional board test (FBT) is still required, a process that still relies on test engineers' understanding of circuit functionality and manually developed test procedures. While functional automatic test equipment (ATE) has been reduced considerably in price, FBT test costs have not been arrested. In fact, FBT is a huge undertaking that can take several weeks or months of test engineering development, unacceptably stretching time to market. The alternative, of selling products that have not undergone comprehensive FBT is equally, if not more, intolerable.

A.T.E. Solutions, Inc.

High Frequency Dk and Df Test Methods Comparison High Density Packaging User Group (HDP) Project

Technical Library | 2019-02-06 22:02:08.0

The High Density Packaging (HDP) user group has completed a project to evaluate the majority of viable Dk (Dielectric Constant)/Df (Dissipation Factor) and delay/loss electrical test methods, with a focus on the methods used for speeds above 2 GHz. A comparison of test methods from 1 to 2 GHz through to higher test frequencies was desired, testing a variety of laminate materials (standard volume production with UL approval, low loss, and "halogen-free" laminate materials). Variations in the test board material resin content/construction and copper foil surface roughness/type were minimized. Problems with Dk/Df and loss test methods and discrepancies in results are identified, as well as possible correlations or relationships among these higher speed test methods.

Oracle Corporation

Operation about MIC audio test

Technical Library | 2021-11-15 07:08:00.0

The audio comprehensive tester can test consumer audio, automotive electronics and other audio products, such as mobile phones, headphones, speakers, players, power amplifiers, home cinemas, televisions, set-top boxes, automotive multimedia hosts, etc. It is suitable for rapid testing of production line and R & D testing. It can realize fast audio, simple and convenient operation, and support automatic testing. Support analog / digital input and analog output, up to 192K digital sampling rate, and multiple test functions, including audio output, signal acquisition, audio file analysis, etc.

Shenzhen PTI Technology CO.,LTD

Methods Used In The Detection Of Counterfeit Electronic Components

Technical Library | 2022-10-04 16:43:10.0

In this paper I will discuss the different methods and equipment used to detect counterfeit electronic parts, specifically integrated circuits as well as demonstrate some of the "red flags" that help to identify a part as being suspected counterfeit. We will begin with the initial receipt of the parts and the examination of the outer packaging, the basic visual inspection of the parts, the visual inspection and documentation at high magnification, permanency marking, blacktop test, scrape test, XRF (RoHS), decapsulation, X-ray, basic electrical testing, C-SAM, full function testing and limited function testing.

Electro-Comp Tape and Reel Services, LLC


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