Technical Library: thermo (Page 1 of 2)

Micro-Sectioning of PCBs for Failure Analysis

Technical Library | 2010-01-13 12:34:10.0

Micro-sectioning (sometimes referred to as cross-sectioning)is a technique, used to characterize materials or to perform a failure mode analysis, for exposing an internal section of a PCB or package. Destructive in nature, cross-sectioning requires encapsulation of the specimen in order to provide support, stability, and protection. Failures that can be investigated through micro-sectional analysis include component defects, thermo-mechanical failures, processing failures related to solder reflow, opens or shorts, voiding and raw material evaluations.

BEST Inc.

Gold Stud Bump Flip Chip Bonding on Molded Interconnect Devices

Technical Library | 2015-09-23 22:08:32.0

A molded interconnect device (MID) is an injection molded thermoplastic substrate which incorporates a conductive circuit pattern and integrates both mechanical and electrical functions. (...) Flip chip bonding of bare die on MID can be employed to fully utilize MID’s advantage in device miniaturization. Compared to the traditional soldering process, thermo-compression bonding with gold stud bumps provides a clear advantage in its fine pitch capability. However, challenges also exist. Few studies have been made on thermocompression bonding on MID substrate, accordingly little information is available on process optimization, material compatibility and bonding reliability. Unlike solder reflow, there is no solder involved and no “self-alignment,” therefore the thermo-compression bonding process is significantly more dependent on the capability of the machine for chip assembly alignment.

Flex (Flextronics International)

High Frequency Electrical Performance and Thermo-Mechanical Reliability of Fine-Pitch, Copper - Metallized Through-Package-Vias (TPVs) in Ultra - thin Glass Interposers

Technical Library | 2017-08-10 01:23:22.0

This paper demonstrates the high frequency performance and thermo-mechanical reliability of through vias with 25 μm diameter at 50 μm pitch in 100 μm thin glass substrates. Scaling of through via interconnect diameter and pitch has several electrical performance advantages for high bandwidth 2.5D interposers as well as mm-wave components for 5G modules.

Georgia Institute of Technology

CORRELATION BETWEEN CALCULATION AND PRACTICE FOR SIMPLE TOP-TO-BOTTOM PCB HEAT DISSIPATION USING TIM & VIAS

Technical Library | 2024-07-24 01:27:58.0

A study of the Thermo Design PCB Indicates The better the performance of the heatsink (=low Rth), the more influence the TIMs have  The thickness of a TIM is often more critical than the thermal conductivity of the material  The thermal resistance of the surface between the materials are most critical  Better use many small vias than a few big vias!  Plated or filled vias are very expensive to get, better try to stay with standard!

Würth Elektronik GmbH & Co. KG

Effect of Encapsulation Materials on Tensile Stress during Thermo-Mechanical Cycling of Pb-Free Solder Joints

Technical Library | 2019-03-06 21:26:14.0

Electronic assemblies use a large variety of polymer materials with different mechanical and thermal properties to provide protection in harsh usage environments. However, variability in the mechanical properties such as the coefficient of thermal expansion and elastic modulus effects the material selection process by introducing uncertainty to the long term impacts on the reliability of the electronics. Typically, the main reliability issue is solder joint fatigue which accounts for a large amount of failures in electronic components. Therefore, it is necessary to understand the effect of polymer encapsulations (coatings, pottings and underfills) on the solder joints when predicting reliability.This paper presents the construction and validation of a thermo-mechanical tensile fatigue specimen. The thermal cycling range was matched with potting expansion properties in order to vary the magnitude of tensile stress imposed on solder joints

DfR Solutions

Reliability Screening of Lower Melting Point Pb-Free Alloys Containing Bi

Technical Library | 2015-07-01 16:51:43.0

Aerospace and military companies continue to exercise RoHS exemptions and to intensively research the long term attachment reliability of RoHS compliant solders. Their products require higher vibration, drop/shock performance, and combined-environment reliability than the conventional SAC305 alloy provides. The NASA-DoD Lead-Free Electronics Project confirmed that pad cratering is one of the dominant failure modes that occur in various board level reliability tests, especially under dynamic loading. One possible route to improvement of the mechanical and thermo-mechanical properties of solder joints is the use of Pb-free solders with lower process temperatures. Lower temperatures help reduce the possibility of damaging the boards and components, and also may allow for the use of lower Tg board materials which are less prone to pad cratering defects. There are several Sn-Ag-Bi and Sn-Ag-Cu-Bi alloys which melt about 10°C lower than SAC305. The bismuth in these solder compositions not only reduces the melting temperature, but also improves thermo-mechanical behavior. An additional benefit of using Bi-containing solder alloys is the possibility to reduce the propensity to whisker growth

Honeywell International

Solder Phase Coarsening, Fundamentals, Preparation, Measurement and Prediction

Technical Library | 2009-05-07 23:23:00.0

Thermal fatigue has been one of the most serious problems for solder joint reliability. Thermo-mechanical fatigue failure is considered to be closely related to micro-structural coarsening (grain/phase growth). Factors that influence the phase growth are studied and measurement methods are discussed, including the preparation of the eutectic solder sample for phase size measurement. Three categories of models used to predict grain growth in polycrystalline materials are presented. Finally, phase growth in solder during high temperature aging and temperature cycling and its use as a damage correlation factor are discussed.

DfR Solutions

Using Physics of Failure to Predict System Level Reliability for Avionic Electronics

Technical Library | 2013-12-11 23:24:32.0

Today's analyses of electronics reliability at the system level typically use a "black box approach", with relatively poor understanding of the behaviors and performances of such "black boxes" and how they physically and electrically interact (...) The incorporation of more rigorous and more informative approaches and techniques needs to better understand (...) Understanding the Physics of Failure (PoF) is imperative. It is a formalized and structured approach to Failure Analysis/Forensics Engineering that focuses on total learning and not only fixing a particular current problem (...) In this paper we will present an explanation of various physical models that could be deployed through this method, namely, wire bond failures; thermo-mechanical fatigue; and vibration.

DfR Solutions

ASSESSMENT OF ACCRUED THERMO-MECHANICAL DAMAGE IN LEADFREE PARTS DURING FIELD-EXPOSURE TO MULTIPLE ENVIRONMENTS

Technical Library | 2022-10-11 20:29:31.0

Electronic assemblies deployed in harsh environments may be subjected to multiple thermal environments during the use-life of the equipment. Often the equipment may not have any macro-indicators of damage such as cracks or delamination. Quantiication of thermal environments during use-life is often not feasible because of the data-capture and storage requirements, and the overhead on core-system functionality. There is need for tools and techniques to quantify damage in deployed systems in absence of macro-indicators of damage without knowledge of prior stress history. The presented PHM framework is targeted towards high reliability applications such as avionic and space systems. In this paper, Sn3.0Ag0.5Cu alloy packages have been subjected to multiple thermal cycling environments including -55 to 125C and 0 to 100C. Assemblies investigated include area-array packages soldered on FR4 printed circuit cards. The methodology involves the use of condition monitoring devices, for gathering data on damage pre-cursors at periodic intervals. Damage-state interrogation technique has been developed based on the Levenberg-Marquardt Algorithm in conjunction with the microstructural damage evolution proxies. The presented technique is applicable to electronic assemblies which have been deployed on one thermal environment, then withdrawn from service and targeted for redeployment in a different thermal environment. Test cases have been presented to demonstrate the viability of the technique for assessment of prior damage, operational readiness and residual life for assemblies exposed to multiple thermo-mechanical environments. Prognosticated prior damage and the residual life show good correlation with experimental data, demonstrating the validity of the presented technique for multiple thermo-mechanical environments.

Auburn University

Effect Of Voids On Thermo-Mechanical Reliability of Solder Joints

Technical Library | 2019-10-16 23:18:15.0

Despite being a continuous subject of discussion, the existence of voids and their effect on solder joint reliability has always been controversial. In this work we revisit previous works on the various types of voids, their origins and their effect on thermo-mechanical properties of solder joints. We focus on macro voids, intermetallics micro voids, and shrinkage voids, which result from solder paste and alloy characteristics. We compare results from the literature to our own experimental data, and use fatigue-crack initiation and propagation theory to support our findings. Through a series of examples, we show that size and location of macro voids are not the primary factor affecting solder joint mechanical and thermal fatigue life. Indeed, we observe that when these voids area conforms to the IPC-A-610 (D or F) or IPC-7095A standards, macro voids do not have any significant effect on thermal cycling or drop shock performance.

Alpha Assembly Solutions

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