Technical Library | 2018-10-24 18:04:12.0
Polymer Thick Film (PTF)-based printed electronics (aka Printed Electronics) has improved in durability over the last few decades and is now a proven alternative to copper circuitry in many applications once thought beyond the capability of PTF circuitry. This paper describes peak performance and areas for future improvement.State-of-the-art PTF circuitry performance includes the ability to withstand sharp crease tests, 85C/85%RH damp heat 5VDC bias aging (silver migration), auto seat durability cycling, SMT mandrel flexing, and others. The IPC/SGIA subcommittee for Standards Tests development has adopted several ASTM test methods for PTF circuitry and is actively developing needed improvements or additions. These standards are described herein. Advantages of PTF circuitry over copper include: varied conductive material compositions, lower cost and lower environmental impact. Necessary improvements include: robust integration of chip and power, higher conductivity, and fine line multi-layer patterning.
Technical Library | 2019-04-10 22:08:31.0
The stimulating impact of the automotive industry has sharpened focus on immersion tin (i-Sn) more than ever before. Immersion tin with its associated attributes, is well placed to fulfill the requirements of such a demanding application. In an environment dominated by reliability, the automotive market not only has very stringent specifications but also demands thorough qualification protocols. Qualification is ultimately a costly exercise. The good news is that i-Sn is already qualified by many tier one OSATs. The focus of this paper is to generate awareness of the key factors attributed to soldering i-Sn. Immersion tin is not suitable for wire bonding but ultimately suited for multiple soldering applications. The dominant topics of this paper will be IMC formations in relation to reflow cycles and the associated solderability performance. Under contamination free conditions, i-Sn can provide a solderable finish even after multiple reflow cycles. The reflow conditions employed in this paper are typical for lead free soldering environments and the i-Sn thicknesses are approximately 1 μm.
Technical Library | 2020-07-02 13:16:32.0
Principle of shielding 1 The principle of shielding is creating a conductive layer completely surrounding the object you want to shield. This was invented by Michael Faraday and this system is known as a Faraday Cage. 2 Ideally, the shielding layer will be made up of conductive sheets or layers of metal that are connected by means of welding or soldering, without any interruptions. The shielding is perfect when there is no difference in conductivity between the used materials. When dealing with frequencies below 30 MHz, the metal thickness affects shielding effectiveness. We also offer a range of shielding methods for plastic enclosures. A complete absence of interruptions is not a realistic goal since the Faraday cage will have to be opened from time to time so electronics, equipment or people can be moved in or out. Openings are also needed for displays, ventilation, cooling, power supply, signals etc. 3 Shielding works in both directions, items inside the shielded room are shielded from outside influences. (Fig. 3.1)
Technical Library | 2015-08-25 13:51:27.0
The stencil printing process is one of the most critical processes in the electronic production. Due to the requirement: "faster and smaller" it is necessary to place components with different paste volume close together without regard to solder paste printing. In our days it is no longer possible to control the solder paste volume only by adjustment of the aperture dimensions. The requirements of solder paste volumes for specific components are realized by different thicknesses of metal sheets in one stencil with so called step stencils. The step-down stencil is required when it is desirable to print fine-pitch devices using a thinner stencil foil, but print other devices using a thicker stencil foil. The paper presents the innovative technology of step-up and step-down stencils in a laser cutting and laser welding process. The step-up/step-down stencil is a special development for the adjustment of solder paste quantity, fulfilling the needs of placement and soldering. This includes the laser cutting and laser welding process as well as the resulting stencil characteristics and the potential of the printing process.
Technical Library | 2020-03-26 14:55:29.0
This paper introduces line confocal technology that was recently developed to characterize 3D features of various surface and material types at sub-micron resolution. It enables automatic microtopographic 3D imaging of challenging objects that are difficult or impossible to scan with traditional methods, such as machine vision or laser triangulation.Examples of well-suited applications for line confocal technology include glossy, mirror-like, transparent and multi-layered surfaces made of metals (connector pins, conductor traces, solder bumps etc.), polymers (adhesives, enclosures, coatings, etc.), ceramics (components, substrates, etc.) and glass (display panels, etc.). Line confocal sensors operate at high speed and can be used to scan fast-moving surfaces in real-time as well as stationary product samples in the laboratory. The operational principle of the line confocal method and its strengths and limitations are discussed.Three metrology applications for the technology in electronics product manufacturing are examined: 1. 3D imaging of etched PCBs for micro-etched copper surface roughness and cross-sectional profile and width of etched traces/pads. 2. Thickness, width and surface roughness measurement of conductive ink features and substrates in printed electronics applications. 3. 3D imaging of adhesive dots and lines for shape, dimensions and volume in PCB and product assembly applications.
Technical Library | 2020-09-08 16:43:32.0
Atomic layer deposition (ALD) is an ultra-thin film deposition technique that has found many applications owing to its distinct abilities. They include uniform deposition of conformal films with controllable thickness, even on complex three-dimensional surfaces, and can improve the efficiency of electronic devices. This technology has attracted significant interest both for fundamental understanding how the new functional materials can be synthesized by ALD and for numerous practical applications, particularly in advanced nanopatterning for microelectronics, energy storage systems, desalinations, catalysis and medical fields. This review introduces the progress made in ALD, both for computational and experimental methodologies, and provides an outlook of this emerging technology in comparison with other film deposition methods. It discusses experimental approaches and factors that affect the deposition and presents simulation methods, such as molecular dynamics and computational fluid dynamics, which help determine and predict effective ways to optimize ALD processes, hence enabling the reduction in cost, energy waste and adverse environmental impacts. Specific examples are chosen to illustrate the progress in ALD processes and applications that showed a considerable impact on other technologies.
Technical Library | 2021-04-08 00:30:49.0
As the electronic industry moves to lead-free assembly and finer-pitch circuits, widely used printed wiring board (PWB) finish, SnPb HASL, has been replaced with lead-free and coplanar PWB finishes such as OSP, ImAg, ENIG, and ImSn. While SnPb HASL offers excellent corrosion protection of the underlying copper due to its thick coating and inherent corrosion resistance, the lead-free board finishes provide reduced corrosion protection to the underlying copper due to their very thin coating. For ImAg, the coating material itself can also corrode in more aggressive environments. This is an issue for products deployed in environments with high levels of sulfur containing pollutants encountered in the current global market. In those corrosive environments, creep corrosion has been observed and led to product failures in very short service life (1-5 years). Creep corrosion failures within one year of product deployment have also been reported. This has prompted an industry-wide effort to understand creep corrosion
Technical Library | 2021-05-13 16:03:25.0
Sn-based lead-free solders such as Sn-Ag-Cu, Sn-Cu, and Sn-Bi have been used extensively for a long time in the electronic packaging field. Recently, low-temperature Sn-Bi solder alloys attract much attention from industries for flexible printed circuit board (FPCB) applications. Low melting temperatures of Sn-Bi solders avoid warpage wherein printed circuit board and electronic parts deform or deviate from the initial state due to their thermal mismatch during soldering. However, the addition of alloying elements and nanoparticles Sn-Bi solders improves the melting temperature, wettability, microstructure, and mechanical properties. Improving the brittleness of the eutecticSn-58wt%Bi solder alloy by grain refinement of the Bi-phase becomes a hot topic. In this paper, literature studies about melting temperature, microstructure, inter-metallic thickness, and mechanical properties of Sn-Bi solder alloys upon alloying and nanoparticle addition are reviewed
Technical Library | 2023-02-13 19:14:03.0
Technology Focus: Develop and evaluate nanoparticle filled conformal coatings designed to provide long term whisker penetration resistance and coverage on tin rich metal surfaces prone to whisker growth in commercial lead-free electronics used in modern DoD systems. Research Objectives: Identify the fundamental mechanisms by which conformal coatings provide long-term tin whisker penetration resistance and inhibit nucleation/growth. Correlate mechanical properties and coverage thickness to whisker penetration resistance. Project Progress and Results: Functionalized nanosilica and non-functional nanoalumina enhanced polyurethane conformal coatings have shown improved spray coating coverage characteristics and crack resistance during thermal cycling fatigue testing. Lead-free assembly whisker mitigation validation testing is in process. Technology Transition: Current project partners provide coating materials to industry. SERDP test data will be considered during updates to the DoD adopted IPC standards for coating materials and coverage.
Technical Library | 2023-07-25 16:50:02.0
Some of the new handheld communication devices offer real challenges to the paste printing process. Normally, there are very small devices like 01005 chip components as well as 0.3 mm pitch uBGA along with other devices that require higher deposits of solder paste. Surface mount connectors or RF shields with coplanarity issues fall into this category. Aperture sizes for the small devices require a stencil thickness in the 50 to 75 um (2-3 mils) range for effective paste transfer whereas the RF shield and SMT connector would like at least 150 um (6 mils) paste height. Spacing is too small to use normal step stencils. This paper will explore a different type of step stencil for this application; a "Two-Print Stencil Process" step stencil. Here is a brief description of a "Two-Print Stencil Process". A 50 to 75 um (2-3 mils) stencil is used to print solder paste for the 01005, 0.3 mm pitch uBGA and other fine pitch components. While this paste is still wet a second in-line stencil printer is used to print all other components using a second thicker stencil. This second stencil has relief pockets on the contact side of the stencil any paste was printed with the first stencil. Design guidelines for minimum keep-out distances between the relief step, the fine pitch apertures, and the RF Shields apertures as well relief pocket height clearance of the paste printed by the first print stencil will be provided.
