Technical Library | 2022-02-16 15:34:32.0
Because of the phase-out of CFCs and HCFCs, standard solder pastes and fluxes evolved from RA and RMA fluxes to No-Clean, to low residue No-Clean, to very low residue No-Clean. Many companies came out with their cleaning solutions, aqueous and semi-aqueous, with each product release being more innovative than the previous one. Unfortunately for most of the suppliers of cleaners, two other trends appeared; lead-free soldering and the progressive miniaturization of electronic devices
Technical Library | 2023-05-22 16:49:42.0
Our customers' issues • Apertures are getting smaller • Paste does not release as well • Contaminates the bottom of the stencil • Increases defects / reduces yield Insufficient solder Bridging Solder balls on surface of PCB Flux residue • Requires more frequent cleaning • Reduced efficiency (wasted time) • Increased use of consumables (cost) USC fabric (use "cheap" fabric to reduce cost) Lint creates more defects Cleaning chemistries (use IPA to reduce cost) IPA breaks down flux and can create more defects
Technical Library | 2023-06-12 19:46:10.0
Solder paste printing is understood to be the leading contributor of defects in the electronics assembly process. Because yield accounts for such a large percentage of the margin, the greatest opportunity to improve profitability in the assembly of most electronics can be gained by reducing or eliminating solder defects. This article examines process adjustments made through stencil design that correct a misalignment situation between the PCB and stencil, leading to a 43% reduction in assembly defects. Examples of each are found in Table 1.
Technical Library | 2017-07-13 16:16:27.0
Controlled humidity and temperature controlled surface insulation resistance (SIR) measurements of flux covered test vehicles, subject to a direct current (D.C.) bias voltage are recognized by a number of global standards organizations as the preferred method to determine if no clean solder paste and wave soldering flux residues are suitable for reliable electronic assemblies. The IPC, Japanese Industry Standard (JIS), Deutsches Institut fur Normung (DIN) and International Electrical Commission (IEC) all have industry reviewed standards using similar variations of this measurement. (...) This study will compare the results from testing two solder pastes using the IPC-J-STD-004B, IPC TM-650 2.6.3.7 surface insulation resistance test, and IPC TM-650 2.3.25 in an attempt to investigate the correlation of ROSE methods as predictors of electronic assembly electrical reliability.
Technical Library | 2008-03-18 12:36:31.0
This paper examines the construction of a notebook mainboard with more than 2000 components and no wave soldering required. The board contains standard SMD, chipset BGAs, connectors, through hole components and odd forms placed using full automation and soldered after two reflow cycles under critical process parameters. However, state of the art technology does not help if the process parameters are not set carefully. Can all complex BGAs, THTs and even screws be soldered on a single stencil? What will help us overcome bridging, insufficient solder and thombstoning issues? This paper will demonstrate the placement of all odd shape components using pin-in-paste stencil design and full completion of the motherboard after two reflow cycles.
Technical Library | 2009-05-14 13:57:43.0
Is screen printing technology able to keep pace with rising quality demands and increasingly complex board layouts? Or, is new jet printing technology ready to fill the gap? A comparison study between the two methods reveals some interesting differences. Screen printers offer some possibilities for optimizing solder paste deposits, but optimization is far easier and quicker with the jet printer. At the same time, the ability to print individualized deposits on every single pcb pad may be the ultimate answer to the growing quality challenge.
Technical Library | 2021-08-25 16:34:37.0
As the traditional eutectic SnPb solder alloy has been outlawed, the electronic industry has almost completely transitioned to the lead-free solder alloys. The conventional SAC305 solder alloy used in lead-free electronic assembly has a high melting and processing temperature with a typical peak reflow temperature of 245ºC which is almost 30ºC higher than traditional eutectic SnPb reflow profile. Some of the drawbacks of this high melting and processing temperatures are yield loss due to component warpage which has an impact on solder joint formation like bridging, open defects, head on pillow.
Technical Library | 2023-06-12 18:33:29.0
This paper presents a real-time predictive approach to improve solder paste stencil printing cycle decision making process in surface mount assembly lines. Stencil cleaning is a critical process that influences the quality and efficiency of printing circuit board. Stencil cleaning operation depends on various process variables, such as printing speed, printing pressure, and aperture shape. The objective of this research is to help efficiently decide stencil printing cleaning cycle by applying data-driven predictive methods. To predict the printed circuit board quality level, a recurrent neural network (RNN) is applied to obtain the printing performance for the different cleaning aging. In the prediction model, not only the previous printing performance statuses are included, but also the printing settings are used to enhance the RNN learning. The model is tested using data collected from an actual solder paste stencil printing line. Based on the predicted printing performance level, the model can help automatically identify the possible cleaning cycle in practice. The results indicate that the proposed model architecture can predictively provide accurate solder paste printing process information to decision makers and increase the quality of the stencil printing process.
Technical Library | 2018-06-13 11:42:00.0
The art of screen printing solder paste for the surface mount community has been discussed and presented for several decades. However, the impending introduction of passive Metric 0201 devices has reopened the need to re-evaluate the printing process and the influence of stencil architecture. The impact of introducing apertures with architectural dimensions’ sub 150um whilst accommodating the requirements of the standard suite of surface mount connectors, passives and integrated circuits will require a greater knowledge of the solder paste printing process.The dilemma of including the next generation of surface mount devices into this new heterogeneous environment will create area ratio challenges that fall below todays 0.5 threshold. Within this paper the issues of printing challenging area ratio and their associated aspect ratio will be investigated. The findings will be considered against the next generation of surface mount devices.
Technical Library | 2023-11-06 17:08:44.0
A new process has been developed for RF shielding on compact electronic communications devices using automated solder paste dispensing. The process is known as Shield Edge Interconnect (SEI). SEI designs enable parts to be processed though underfill before placing of the RF shield and allows more complete use of valuable PCB real estate to achieve reduced form factor requirements and/or for added components on products such as smartphones and tablets. The reduced form factor creates challenges for the assembly of those devices. This process, enabled by Speedline dispensing technology, relies on extremely accurate dispensing of solder paste on copper traces located along the outer edge of the PCB. The result is a robust process solution for SEI in which proprietary closed loop dispenser, pump, vision, and software technologies enable a high volume manufacturing (HVM) process.
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