Technical Library | 1999-05-06 11:52:21.0
The market's demand for increasingly powerful products, in smaller and smaller packaging, creates a cooling problem. Integrated circuit (IC) lifetime is dependent upon its operating temperature, creating a trade-off situation: either you enlarge the package to accept additional cooling, or you sacrifice IC lifetime.
Technical Library | 1999-05-07 10:11:55.0
The Intel StrataFlashTM memory technology represents a cost breakthrough for flash memory devices by enabling the storage of two bits of data in a single flash memory transistor. This paper will discuss the evolution of the two bit/cell technology from conception to production.
Technical Library | 1999-05-07 10:13:38.0
This paper will review the device physics governing the operation of the industry standard ETOX™ flash memory cell and show how it is ideally suited for multiple bit per cell storage, through its storage of electrons on an electrically isolated floating gate and through its direct access to the memory cell.
Technical Library | 2001-05-23 16:50:56.0
It’s not pretty out there. Companies have spent fortunes on ERP software and implementation only to find that business performance has not improved at all. These large investments and negative ROIs have created a whirlpool of controversy, rampant company politics and even a number of lawsuits. The trade press has reported many negative ERP stories, and even annual reports have pointed the finger at ERP for lower-than-expected earnings. For some, this has created a higher level of fear about making a big ERP mistake...
Technical Library | 2016-06-30 14:00:32.0
When designing PLLs in nanometer CMOS, it is essential to validate the closed-loop PLL performance metrics with nanometer SPICE accuracy before going to silicon. Transistor-level, closed-loop PLL verification has been impractical due to traditional SPICE and RF simulator performance and capacity limitations. By using Analog FastSPICE, designers dont have to trade accuracy for performance. Read this white paper to see how AFS: Delivers closed-loop PLL transistor-level verification Supports direct jitter measurements Produces phase noise results correlating within 1-2dB of silicon
Technical Library | 1999-05-07 10:22:03.0
The MMX™ technology is an extension to the Intel Architecture (IA) aimed at boosting the performance of multimedia applications. This technology is the most significant IA extension since the introduction of the Intel386™ microprocessor. The challenge in implementing this technology came from retrofitting the new functionality into existing Pentium® and Pentium® Pro processor designs.
Technical Library | 2012-03-08 20:08:57.0
You may have heard talk in the news lately regarding counterfeit electronic components making it into the US military supply chain. The U.S. Senate Armed Services Committee (SASC) recently reported in the Counterfeit Electronic Parts in the Defense Department Supply Chain hearing held on November 17, 2011, 1,800 cases of suspected counterfeit components that went into more than 1 million individual products. If you consider this number for the military, we can only imagine the number of counterfeits in our commercial yet high reliability products, such as life support or other critical systems. If you are the person within your electronics-based company who must perform risk analyses, counterfeiting is not a new concern, yet many do not realize just how good counterfeiters have become at their "trade".
Technical Library | 2010-09-02 13:13:03.0
As chip packaging and interconnectivity have become more dense and operate at higher clock frequencies, physical access for traditional bed-of-nails testing becomes limited. This results in loss of ICT (in-circuit test) fault coverage and higher test fi
Technical Library | 2022-12-19 18:59:51.0
Material and Process Characterization studies can be used to quantify the harmful effects that might arise from solder flux and other process residues left on external surfaces after soldering. Residues present on an electronic assembly can cause unwanted electrochemical reactions leading to intermittent performance and total failure. Components with terminations that extend underneath the package can trap flux residue. These bottom terminated components are flush with the bottom of the device and can have small solderable terminations located along the perimeter sides of the package. The clearance between power and ground render high electrical forces, which can propagate electrochemical interactions when exposed to atmospheric moisture (harsh environments). The purpose of this research is to predict and understand the functional performance of residues present under single row QFN component packages. The objective of the research study is to develop and collect a set of guidelines for understanding the relationship between ionic contamination and electrical performance of a BTC component when exposed to atmospheric moisture and the trade-offs between electrical, ionic contamination levels, and cleanliness. Utilizing the knowledge gained from undertaking the testing of QFN components and associated DOE, the team will establish a reference Test Suite and Test Spec for cleanliness.
Technical Library | 2016-04-14 13:49:44.0
A system level test, usually built-in test (BIT), determines that one or more subsystems are faulty. These subsystems sent to the depot or factory repair facility, called units under test (UUTs) often pass that test, an event we call No-Fault-Found (NFF). With more-and more electronics monitored by BIT, it is more likely that an intermittent glitch will trigger a call for a maintenance action resulting in NFF. NFFs are often confused with false alarm (FA), cannot duplicate (CNDs)or retest OK (RTOK) events. NFFs at the depot are caused by FAs, CNDs, RTOKs as well as a number of other complications. Attempting to repair NFF scan waste precious resources, compromise confidence in the product, create customer dissatisfaction, and the repair quality remains a mystery. The problem is compounded by previous work showing that most failure indications calling for repair action at the system level are invalid. NFFs can be caused by real failures or may be a result of system level false alarms. Understanding the cause of the problem may help us distinguish between units under test (UUTs) that we can repair and those that we cannot. In calculating the true cost of repair we must account for wasted effort in attempting to repair unrepairable UUTs.This paper will shed some light on this trade-off. Finally, we will explore approaches for dealing with the NFF issue in a cost effective manner.
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