Technical Library | 2011-06-29 14:44:52.0
High yields in the stencil printing process are essential to a profitable SMT assembly operation. But as circuit complexity continues to increase, so do the challenges of maintaining a successful solder paste deposition process. To help assemblers address
Technical Library | 2022-06-20 21:01:37.0
We've been doing a lot of print testing in our lab. In our first set of published results, "The Impact of Reduced Solder Alloy Powder Size on Solder Paste Print Performance1" from IPC/APEX 2016, we revealed a hierarchy of input variables to maximize solder paste transfer efficiency and minimize variation. In that study, we used a fully-optioned stencil as part of the equipment set. In order to tease out the data we were looking for, we could not lose critical information to the noise of stencil-induced variations.
Technical Library | 2023-05-22 16:42:56.0
Nano-coatings are applied to solder paste stencils with the intent of improving the solder paste printing process. Do they really make a noticeable improvement? The effect of Nano-coatings on solder paste print performance was investigated. Transfer efficiencies were studied across aperture sizes ranging from 0.30 to 0.80 area ratio. Also investigated were the effects of Nano-coatings on transfer efficiencies of tin-lead, lead-free, water soluble, no-clean, and type 3, 4, and 5 solder pastes. Solder paste print performance for each Nano-coating was summarized with respect to all of these variables.
Technical Library | 2023-05-22 17:46:29.0
Over the past several years, much research has been performed and published on the benefits of stencil nano-coatings and solvent under wipes. The process improvements are evident and well-documented in terms of higher print and end-of-line yields, in improved print volume repeatability, in extended under wipe intervals, and in photographs of the stencil's PCB-seating surface under both white and UV light. But quantifying the benefits using automated Solder Paste Inspection (SPI) methods has been elusive at best. SPI results using these process enhancements typically reveal slightly lower paste transfer efficiencies and less variation in print volumes to indicate crisper print definition. However, the improvements in volume data do not fully account for the overall improvements noted elsewhere in both research and in production.
Technical Library | 2018-10-03 20:41:44.0
Voids in solder joints plague many electronics manufacturers. Do you have voids in your life? We have good news for you, there are many excellent ways to "Fill the Void." This paper is a continuation of previous work on voiding in which the following variables were studied: water soluble lead-free solder pastes, a variety of stencil designs, and reflow profiles. Quad Flat No-Lead (QFN) component thermal pads were used as the test vehicle. The voiding results were summarized and recommendations were made for reduction of voiding.
Technical Library | 2015-12-31 15:19:28.0
Today's consumer electronic product are characterized by miniatuization, portability and light weight with high performance, especially for 3G mobile products. In the future more fine pitch CSPs (0.4mm) component will be required. However, the product reliability has been a big challenge with the fine pitch CSP. Firstly, the fine pitch CSPs are with smaller solder balls of 0.25mm diameter or even smaller. The small solder ball and pad size do weaken the solder connection and the adhesion of the pad and substrate, thus the pad will peel off easily from the PCB substrate. In addition, miniature solder joint reduce the strength during mechanical vibration, thermal shock, fatigue failure, etc. Secondly, applying sufficient solder paste evenly on the small pad of the CSP is difficult because stencil opening is only 0.25mm or less. This issue can be solved using the high end type of stencil such as Electroforming which will increase the cost.
Technical Library | 2018-03-28 14:54:36.0
Six decades of legacy experience makes the specification and production of screens and masks to produce repeatable precision results mostly an exercise in matching engineering needs with known ink and substrate performance to specify screen and stencil characteristics. New types of functional and electronic devices, flex circuits and medical sensors, industrial printing, ever finer circuit pitch, downstream additive manufacturing processes coupled with new substrates and inks that are not optimized for the rheological, mechanical and chemical characteristics for the screen printing process are becoming a customer driven norm. Many of these materials do not work within legacy screen making, curing or press set-up parameters. Many new materials and end uses require new screen specifications.This case study presents a DOE based method to pre-test new materials to categorize ink and substrate rheology, compatibility and printed feature requirement to allow more accurate screen recipes and on-press setting expectations before the project enters the production environment where time and materials are most costly and on-press adjustment methods may be constrained by locked, documented or regulatory processes, equipment limitations and employee experience.
Technical Library | 2018-03-05 11:17:31.0
In order to comply with RoHS and WEEE directives, many circuit assemblers are transitioning some or all of their soldering processes from tin-lead to lead-free within the upcoming year. There are no drop-in replacement alloys for tin-lead solder, which is driving a fundamental technology change. This change is forcing manufacturers to take a closer look at everything associated with the assembly process: board and component materials, logistics and materials management, solder alloys and processing chemistries, and even soldering methods. Do not expect a dramatic change in soldering behavior when moving to lead-free solders. The melting points of the alloys are higher, but at molten temperatures the different alloys show similar behaviors in a number of respects. Expect subtler changes, especially near the edges of a process window that is assumed based on tin-lead experience rather than defined through lead-free experimentation. These small changes, many of them yet to be identified and understood, will manifest themselves with lower assembly yields. The key to keeping yields up during the transition to lead-free is quickly learning what and where the subtle distinctions are, and tuning the process to accommodate them.
| 1 |
.gif)
winsouce.jpg)
