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Increase Your Process Control and Lower Cost of Ownership

Technical Library | 2012-11-12 14:06:48.0

With consumers constantly looking for lower prices on their technology products and manufacturers trying to squeak out higher margins from their production lines, the need for process control and lower overhead costs have become even more important. One sector that is often overlooked is the hand soldering area of the factory. Many factories have been struggling with antiquated soldering systems for years. In some cases they are trying to make their investment in stations last much longer than they were designed for, or they are falsely trying to recoup their original investment ‐ all at the cost of higher operating expenses or even worse, reduced operator thru‐put.

Metcal

“A New Paradigm in Crimping Press Design” By Rob Boyd, Senior Product Manager, Schleuniger, Inc.

Technical Library | 2015-05-27 11:47:47.0

It goes without saying that manufacturing companies want the highest possible quality at the lowest possible cost. These days, everyone is trying to do more with less in order to stay relevant in a competitive environment.

Schleuniger, Inc.

Cost effective solution in SMT production: AI and Big Data

Technical Library | 2017-12-12 01:43:55.0

In recent years, more and more companies with SMT production floor are trying to become more efficient and cut production costs. In most cases, the treatment was carried out problematic processes that visible and easy to find. Now these companies came to look problematic processes that are invisible and hard to find.

Proventus Technologies

Testing Digital Designs – The Boundary-scan Balance

Technical Library | 2010-05-20 17:17:03.0

As several industry pundits have expressed in recent years: "the era of 'one test method fits all' seems well behind us." For most test managers with even a modest mix of products, trying to formulate a test policy/philosophy has become a tricky balancing act at the best of times. James Stanbridge, Sales Manager UK for JTAG Technologies, and Steve Lees Managing Director of ATE Solutions look at the options.

JTAG Technologies B. V.

How to improve reliability of PCB equipments

Technical Library | 2012-12-12 03:17:51.0

When we designed the PCB equipments, we should try to simplify crcuit and structure design that on the premise of ensuring the equipments to meet the technology and performance, In modern society, modules design (MD)is a effective measures to improved the pcb equipment reliability. The system were made up simpleness functions of modules to reducing the complexity of the design. Both domestic and abroad, a large number of facts have proved this point, MD was a best choice for PCB equipment design.

Everest PCB equipment Co.,Ltd

CORRELATION BETWEEN CALCULATION AND PRACTICE FOR SIMPLE TOP-TO-BOTTOM PCB HEAT DISSIPATION USING TIM & VIAS

Technical Library | 2024-07-24 01:27:58.0

A study of the Thermo Design PCB Indicates The better the performance of the heatsink (=low Rth), the more influence the TIMs have  The thickness of a TIM is often more critical than the thermal conductivity of the material  The thermal resistance of the surface between the materials are most critical  Better use many small vias than a few big vias!  Plated or filled vias are very expensive to get, better try to stay with standard!

Würth Elektronik GmbH & Co. KG

Tombstone Troubleshooting

Technical Library | 2006-10-26 08:08:00.0

There have been many studies of the causes of tombstoning; some published, some not. They tend to focus on a single process parameter as the root cause of tombstoning. However, there is no single process change that is a sure cure for tombstoning! Those that claim otherwise are either uninformed or trying to sell you something. Rather than limiting your view to a single solution, EFD recommends you heed all of the studies. Like pieces of a puzzle, each study does not reveal the whole picture, but looked at all together, the picture is clear.

Nordson EFD

Packaging Technology and Design Challenge for Fine Pitch Micro-Bump Cu-Pillar and BOT (Direct Bond on Substrate-Trace) Using TCNCP

Technical Library | 2015-12-02 18:32:50.0

(Thermal Compression with Non-Conductive Paste Underfill) Method.The companies writing this paper have jointly developed Copper (Cu) Pillar micro-bump and TCNCP(Thermal Compression with Non-Conductive Paste) technology over the last two+ years. The Cu Pillar micro-bump and TCNCP is one of the platform technologies, which is essentially required for 2.5D/3D chip stacking as well as cost effective SFF (small form factor) package enablement.Although the baseline packaging process methodology for a normal pad pitch (i.e. inline 50μm) within smaller chip size (i.e. 100 mm2) has been established and are in use for HVM production, there are several challenges to be addressed for further development for commercialization of finer bump pitch with larger die (i.e. ≤50μm tri-tier bond pad with the die larger than 400mm2).This paper will address the key challenges of each field, such as the Cu trace design on a substrate for robust micro-joint reliability, TCNCP technology, and substrate technology (i.e. structure, surface finish). Technical recommendations based on the lessons learned from a series of process experimentation will be provided, as well. Finally, this technology has been used for the successful launching of the company FPGA products with SFF packaging technology.

Altera Corporation

Comparison of ROSE, C3/IC, and SIR as an effective cleanliness verification test for post soldered PCBA

Technical Library | 2023-04-17 21:17:59.0

The purpose of this paper is to evaluate and compare the effectiveness and sensitivity of different cleanliness verification tests for post soldered printed circuit board assemblies (PCBAs) to provide an understanding of current industry practice for ionic contamination detection limits. Design/methodology/approach – PCBAs were subjected to different flux residue cleaning dwell times and cleanliness levels were verified with resistivity of solvent extract, critical cleanliness control (C3) test, and ion chromatography analyses to provide results capable of differentiating different sensitivity levels for each test. Findings – This study provides an understanding of current industry practice for ionic contamination detection using verification tests with different detection sensitivity levels. Some of the available cleanliness monitoring systems, particularly at critical areas of circuitry that are prone to product failure and residue entrapment, may have been overlooked. Research limitations/implications – Only Sn/Pb, clean type flux residue was evaluated. Thus, the current study was not an all encompassing project that is representative of other chemistry-based flux residues. Practical implications – The paper provides a reference that can be used to determine the most suitable and effective verification test for the detection of ionic contamination on PCBAs. Originality/value – Flux residue-related problems have long existed in the industry. The findings presented in this paper give a basic understanding to PCBA manufacturers when they are trying to choose the most suitable and effective verification test for the detection of ionic contamination on their products. Hence, the negative impact of flux residue on the respective product's long-term reliability and performance can be minimized and monitored effectively.

Jabil Circuit, Inc.

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