Technical Library | 2020-04-14 15:49:38.0
The number of through-hole components on printed circuit boards (PCB) has declined significantly over the last decade. Miniaturization in electronics has resulted in less THT (through-hole technology) and leads with a finer pitch. For this reason, the soldering of these components has also changed from wave soldering to Point-to-point selective soldering. Soldering these small, fine-pitch components is a challenge when surface mount components (SMD) are positioned very close to THT components on the PCB layout. This study, done in cooperation with a large automotive EMS customer, defines the process windows for through-hole technology for fine-pitch components. It determines what is feasible to solder and defines layout design parameter that make soldering possible with SMD areas and other components on the assembly.
Technical Library | 2019-06-06 13:40:47.0
Legacy electronics assemblies, such as through-hole (Figure 1) and connectorized component packages, are robust and prevalent throughout industry. However, each of these assembly methods have reached their limits in terms of weight, volume, reliability, and most importantly cost. With cost reduction of assemblies now the primary focus area throughout the electronics industry, there is more of a need than ever to implement the latest advancements in surface mount technology (SMT) into electronics assembly designs. Although SMT has been utilized in the electronics industry for many years, implementation of the technology is still in the ever-evolving process of reducing component footprint size, component spacing, and component I/O pitch. Implementation of the most up-to-date SMT processes provides optimal weight, volume, and cost savings, for any type of assembly.
Technical Library | 2019-08-08 10:23:51.0
High mix production is the mainstay of many electronics assembly plants. Lot sizes and board complexities vary and the boards are often mixed technology, comprising a blend of both surface mount and through-hole technology. Modularizing a production line enables a clear distinction between one type of assembly process and another. This article assumes a modern factory where a job can be routed to the selective soldering machine module, the hand assembly bench, or a combination of both. The decision rules of routing a circuit board through hand assembly versus automated selective soldering are discussed. Hand assembly soldering operations require no explanation.
Technical Library | 2019-06-21 10:39:15.0
Recently, an ACI Technologies (ACI) customer called to discuss failures that they had observed with some through-hole capacitor parts. The components were experiencing failures following vibration and accelerated stress testing. Upon receipt of the samples, ACI performed three levels of inspection and Energy Dispersive Spectroscopy (EDS) testing to investigate the root cause of the failures. These analyses enabled ACI to verify the elements comprising the solder joints and make the following recommendations in order to prevent future occurrences. The first inspection was to investigate the capacitor leads using optical microscopy, and no anomalies were found that could indicate bad parts from the vendor or improper handling prior to assembly. However, vertical fill in the barrel of the plated through-holes was too close to the IPC-A-610 minimum specification of 75% to determine a pass/fail condition, and therefore required further investigation.
Technical Library | 2020-07-15 18:49:03.0
Via Filling • Through Hole Vias - IPC-4761 – Plugging – Filling – Filled & Capped • MicroviaFilling and Stacked Vias
Technical Library | 2015-12-23 16:57:27.0
The onset of copper barrel cracks is typically induced by the presence of manufacturing defects. In the absence of discernible manufacturing defects, the causes of copper barrel cracks in printed circuit board (PCB) plated through holes is not well understood. Accordingly, there is a need to determine what affects the onset of barrel cracks and then control those causes to mitigate their initiation.The objective of this research is to conduct a design of experiment (DOE) to determine if there is a relationship between PCB fabrication processes and the prevalence of fine barrel cracks. The test vehicle used will be a 16-layer epoxy-based PCB that has two different sized plated through holes as well as buried vias.
Technical Library | 2019-10-10 00:26:28.0
Voids are a plague to our electronics and must be eliminated! Over the last few years we have studied voiding in solder joints and published three technical papers on methods to "Fill the Void." This paper is part four of this series. The focus of this work is to mitigate voids for via in pad circuit board designs. Via holes in Quad Flat No-Lead (QFN) thermal pads create voiding issues. Gasses can come out of via holes and rise into the solder joint creating voids. Solder can also flow down into the via holes creating gaps in the solder joint. One method of preventing this is via plugging. Via holes can be plugged, capped, or left open. These via plugging options were compared and contrasted to each other with respect to voiding. Another method of minimizing voiding is through solder paste stencil design. Solder paste can be printed around the via holes with gas escape routes. This prevents gasses from via holes from being trapped in the solder joint. Several stencil designs were tested and voiding performance compared and contrasted. In many cases voiding will be reduced only if a combination of mitigation strategies are used. Recommendations for combinations of via hole plugging and stencil design are given. The aim of this paper is to help the reader to "Fill the Void."
Technical Library | 2019-07-17 17:56:34.0
The increased demand for electronic devices in recent years has led to an extensive research in the field to meet the requirements of the industry. Electrolytic copper has been an important technology in the fabrication of PCBs and semiconductors. Aqueous sulfuric acid baths are explored for filling or building up with copper structures like blind micro vias (BMV), trenches, through holes (TH), and pillar bumps. As circuit miniaturization continues, developing a process that simultaneously fills vias and plates TH with various sizes and aspect ratios, while minimizing the surface copper thickness is critical. Filling BMV and plating TH at the same time, presents great difficulties for the PCB manufactures. The conventional copper plating processes that provide good via fill and leveling of the deposit tend to worsen the throwing power (TP) of the electroplating bath. TP is defined as the ratio of the deposit copper thickness in the center of the through hole to its thickness at the surface. In this paper an optimization of recently developed innovative, one step acid copper plating technology for filling vias with a minimal surface thickness and plating through holes is presented.
Technical Library | 2024-05-16 16:06:24.0
Much like actual cities where streets and roads connect buildings together, ICs on a board are connected to each other with copper traces. And just like any metropolitan city, urban expansion tends to move vertically instead of horizontally, but instead of multi-story buildings, we get multilayer boards. Vias are copper-plated holes spanning through the different layers of a given board or panel. They are the entrance locations to the subway stations, if you will. Having those multilayer boards has enabled electronic design to minimize the size of boards immensely without compromising on the complexity.
Technical Library | 2023-06-12 18:52:18.0
This paper will review stencil design requirements for printing solder paste around and in through-hole pads / openings. There is much interest in this procedure since full implementation allows the placement of both through-hole components as well as SMD's and the subsequent reflow of both simultaneously. This in turn eliminates the need to wave solder or hand solder through-hole components.
