Technical Library | 2023-08-16 18:02:27.0
One of our customers in the medical industry requested dam and fill application testing on a Kapton substrate. The material needed to be non-conductive for dispensing around electrical components, acting as structural support. Ultimately the product will be folded, therefore the footprint had to be small.
Technical Library | 2023-08-14 09:06:53.0
In the operation of SMT mounter, the process and integrity of the nozzle of the mounter will have a significant impact on the performance of the machine. As one of the important components of the SMT machine, it is necessary for us to carry out daily maintenance and upkeep of the SMT nozzle. To ensure that the suction nozzle of the SMT machine is intact before operation, how should we do a good job of maintaining the suction nozzle of the SMT machine during normal use? KINGSUN technical team analysis operation has the following main points: 1.Wipe the surface of the SMT nozzle with a dust-free cloth. 2.The small aperture nozzle can be passed through with a thin steel wire and then blown with an air gun. 3.The surface of the nozzle should not be soaked with corrosive solution such as alcohol, as this may cause the surface to fall off. 4.HOLDER should use a cotton swab to wipe the cavity and not damage the filter screen. 5.Regular addition of special grease to HOLDER claws. 6.According to production, it is best to regularly maintain and do other maintenance regularly. (* Suitable for Yamaha SMT machine nozzles , JUKI SMT machine nozzles, Samsung SMT machine nozzles, Panasonic SMT machine nozzles, Fuji SMT machine nozzles, Siemens SMT machine nozzles etc.) Regarding the SMT machine nozzle daily maintenance operation instructions, KINGSUN share with you here , hoping to be helpful to you. More information about Products please Contact US at jenny@ksunsmt.com or visit www.ksunsmt.com , thanks.
Technical Library | 2024-09-04 17:19:30.0
Reviews Kapton material and how it is laser cut and applications supported.
Technical Library | 2013-01-30 14:02:44.0
Many OEM’s require that individual wires and cables used in their products be clearly identified with a mark or label. For some, such as in the military and aerospace markets, wire and cable identification (or “wire ID”) is mandatory and the process is governed by stringent specifications, such as SAE AS50881 (formerly MIL5088L). For others, the decision to use wire ID is a voluntary one. This article will describe what type of information is typically identified on wire and cables, concepts for improved productivity, what types of systems are available and the pros and cons of each.
Technical Library | 2016-11-30 15:53:15.0
The use of microvias in Printed Circuit Boards (PCBs) for military hardware is increasing as technology drives us toward smaller pitches and denser circuitry. Along with the changes in technology, the industry has changed and captive manufacturing lines are few and far between. As PCBs get more complicated, the testing we perform to verify the material was manufactured to our requirements before they are used in an assembly needs to be reviewed to ensure that it is sufficient for the technology and meets industry needs to better screen for long-term reliability. The Interconnect Stress Testing (IST) protocol currently used to identify manufacturing issues in plated through holes, blind, or buried vias are not necessarily sufficient to identify problems with microvias. There is a need to review the current IST protocol to determine if it is adequate for finding bad microvias or if there is a more reliable test that will screen out manufacturing inconsistencies. The objective of this research is to analyze a large population of PCB IST coupons to determine if there is a more effective IST test to find less reliable microvias in electrically passing PCB product and to screen for manufacturing deficiencies. The proposed IST test procedure will be supported with visual inspection of corresponding microvia cross sections and Printed Wiring Assembly (PWA) acceptance test results. The proposed screening will be shown to only slightly affect PCB yield while showing a large benefit to screening before PCBs are used in an assembly.
Technical Library | 2020-03-08 11:35:53.0
A sample for Larry Bush's Maintenance Policies and Procedures - 2nd Edition (A 415-page book in PDF format. Those who purchase also receive 150 support files in editable format to customize and use as samples and templates.)
Technical Library | 2012-04-26 18:52:37.0
First presented at IPC Apex Expo 2012. The reliability, as tested by thermal cycling, of printed wire boards (PWB) are established by three variables; copper quality, material robustness and design. The copper quality was most influential and could be eva
Technical Library | 2019-05-22 21:24:05.0
voidless treatment Smaller components -> miniaturization (01005 capability) Large board handling -> dynamic preheating for large board repair Repeatable processes -> flux and paste application (Dip and Print), residual solder removal (scavenging), dispensing, multiple component handling, and traceability Operator support -> higher automation, software guidance
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
Technical Library | 2014-12-11 18:00:09.0
The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame (...) The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared
