Technical Library: wire bonding strength (Page 1 of 3)

Mechanical stress test for component solder joints and bonding wires

Technical Library | 2016-08-24 06:15:35.0

From consumer electronics to systems control, automotive technology to aviation and aerospace – today, electronics are absolutely essential in many sectors. They increasingly replace mechanical components, eliminating wear and tear and thereby extending the service life. What is easily forgotten in this regard is that electronics are also subject to the laws of mechanics. Mechanical test equipment is crucial to test components for the secure hold of welded, soldered or adhesive bonds. A new, mechanically intricate test probe with universal clamping jaws, that can even grasp the individual bonding wires, is in line with the trend toward ever smaller components. Serving as an actuator for these is a micro drive that can be precisely controlled using a miniaturised motion controller to relieve the control unit in the test device.

XYZTEC bv

NSOP Reduction for QFN RFIC Packages

Technical Library | 2017-08-31 13:43:48.0

Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields. Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction

Peregrine Semiconductor

Copper Wire Bond Failure Mechanisms.

Technical Library | 2014-07-24 16:26:34.0

Wire bonding a die to a package has traditionally been performed using either aluminum or gold wire. Gold wire provides the ability to use a ball and stitch process. This technique provides more control over loop height and bond placement. The drawback has been the increasing cost of the gold wire. Lower cost Al wire has been used for wedge-wedge bonds but these are not as versatile for complex package assembly. The use of copper wire for ball-stitch bonding has been proposed and recently implemented in high volume to solve the cost issues with gold. As one would expect, bonding with copper is not as forgiving as with gold mainly due to oxide growth and hardness differences. This paper will examine the common failure mechanisms that one might experience when implementing this new technology.

DfR Solutions (acquired by ANSYS Inc)

An Innovative Reliability Solution to Interconnect of Flexible/Rigid Substrates

Technical Library | 2016-01-12 11:03:35.0

With the pitch size of interconnect getting finer and finer, the bonding strength between flexible and rigid (e.g. PCB, ceramic) substrates becomes a serious issue because it is not strong enough to meet the customer’s requirement. Capillary underfill has been used to enhance the bonding strength between flexible and rigid substrates, but the enhancement is very limited, particularly for high temperature application. The bonding strength of underfilled flexible/rigid interconnect is dramatically decreased after being used at 180◦C, and the interconnects are weakened by the internal stress caused by the expansion of underfill at high temperatures. In order to resolve reliability issues of the interconnect between flexible/rigid substrates, solder joint encapsulant was implemented into the thermal compression bonding process, which was used to manufacture the interconnect between flexible/rigid substrates. Compared to the traditional process, the strength of the interconnect was doubled and the reliability was significantly improved in high temperature application.

YINCAE Advanced Materials, LLC.

Approaches to Overcome Nodules and Scratches on Wire Bondable Plating on PCBs

Technical Library | 2020-08-27 01:22:45.0

Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.

Teledyne DALSA

Investigation of Impacts on Printed Circuit Board Laminated Composites Caused by Surface Finish Application

Technical Library | 2021-12-29 19:37:20.0

The purpose of this study was to compare the strength of the bond between resin and glass cloth for various composites (laminates) and its dependence on utilized soldering pad surface finishes. Moreover, the impact of surface finish application on the thermomechanical properties of the composites was evaluated. Three different laminates with various thermal endurances were included in the study. Soldering pads were covered with OSP and HASL surface finishes. The strength of the cohesion of the resin upper layer was examined utilizing a newly established method designed for pulling tests.

Czech Technical University in Prague

Failure Modes in Wire bonded and Flip Chip Packages

Technical Library | 2014-12-11 18:00:09.0

The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame (...) The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared

Peregrine Semiconductor

Eliminating Ni Corrosion in ENIG/ENEPIG Using Reduction-Assisted Immersion Gold in Place of Standard Immersion Gold

Technical Library | 2023-01-10 20:08:36.0

Nickel corrosion in ENIG and ENEPIG is occasionally reported; when encountered at assembly it manifests as soldering failures in ENIG and wire bond lifts in ENEPIG. Although not common, it can be highly disruptive, resulting in missed deliver schedules, supply chain disruption, failure analysis investigations, and liability - all very costly.

Uyemura International Corporation

Challenges on ENEPIG Finished PCBs: Gold Ball Bonding and Pad Metal Lift

Technical Library | 2017-09-07 13:56:11.0

As a surface finish for PCBs, Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) was selected over Electroless Nickel/Immersion Gold (ENIG) for CMOS image sensor applications with both surface mount technology (SMT) and gold ball bonding processes in mind based on the research available on-line. Challenges in the wire bonding process on ENEPIG with regards to bondability and other plating related issues are summarized.

Teledyne DALSA

High Reliability and High Throughput Ball Bumping Process Solution – Solder Joint Encapsulant Adhesives

Technical Library | 2018-04-05 10:40:43.0

The miniaturization of microchips is always driving force for revolution and innovation in the electronic industry. When the pitch of bumps is getting smaller and smaller the ball size has to be gradually reduced. However, the reliability of smaller ball size is getting weaker and weaker, so some traditional methods such as capillary underfilling, corner bonding and edge bonding process have been being implemented in board level assembly process to enhance drop and thermal cycling performance. These traditional processes have been increasingly considered to be bottleneck for further miniaturization because the completion of these processes demands more space. So the interest of eliminating these processes has been increased. To meet this demand, YINCAE has developed solder joint encapsulant adhesives for ball bumping applications to enhance solder joint strength resulting in improving drop and thermal cycling performance to eliminate underfilling, edge bonding or corner bonding process in the board level assembly process. In this paper we will discuss the ball bumping process, the reliability such as strength of solder joints, drop test performance and thermal cycling performance.

YINCAE Advanced Materials, LLC.

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