Technical Library | 2023-01-10 20:08:36.0
Nickel corrosion in ENIG and ENEPIG is occasionally reported; when encountered at assembly it manifests as soldering failures in ENIG and wire bond lifts in ENEPIG. Although not common, it can be highly disruptive, resulting in missed deliver schedules, supply chain disruption, failure analysis investigations, and liability - all very costly.
Technical Library | 2017-09-07 13:56:11.0
As a surface finish for PCBs, Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) was selected over Electroless Nickel/Immersion Gold (ENIG) for CMOS image sensor applications with both surface mount technology (SMT) and gold ball bonding processes in mind based on the research available on-line. Challenges in the wire bonding process on ENEPIG with regards to bondability and other plating related issues are summarized.
Technical Library | 2011-03-30 21:14:33.0
The expression "multifunctional PCB", as a synonym for a PCB which is applicable with a variety of assembly techniques, is already established on the market. That means the PCB can be used for multiple reflow soldering and multiple assembly techniques lik
Technical Library | 2012-10-11 19:50:09.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. This paper shows the benefits by using a pure palladium Layer in the ENEPIG (Electroless Nickel, Electroless Palladium, Immersion Gold) and ENEP (Electroless Nickel, Electroless P
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
Technical Library | 2022-02-21 19:49:16.0
The ability to undertake non-destructive testing on semiconductor devices, during both their manufacture and their subsequent use in printed circuit boards (PCBs), has become ever more important for checking product quality without compromising productivity. The use of x-ray inspection not only provides a potentially non-destructive test but also allows investigation within optically hidden areas, such as the wire bonding within packages and the quality of post solder reflow of area array devices (e.g. BGAs, CSPs and flip chips).
Technical Library | 2013-12-11 23:24:32.0
Today's analyses of electronics reliability at the system level typically use a "black box approach", with relatively poor understanding of the behaviors and performances of such "black boxes" and how they physically and electrically interact (...) The incorporation of more rigorous and more informative approaches and techniques needs to better understand (...) Understanding the Physics of Failure (PoF) is imperative. It is a formalized and structured approach to Failure Analysis/Forensics Engineering that focuses on total learning and not only fixing a particular current problem (...) In this paper we will present an explanation of various physical models that could be deployed through this method, namely, wire bond failures; thermo-mechanical fatigue; and vibration.
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