Technical Library | 2023-01-17 17:58:36.0
Heterogeneous integration has become an important performance enabler as high-performance computing (HPC) demands continue to rise. The focus to enable heterogeneous integration scaling is to push interconnect density limit with increased bandwidth and improved power efficiency. Many different advanced packaging architectures have been deployed to increase I/O wire / area density for higher data bandwidth requirements, and to enable more effective die disaggregation. Embedded Multi-die Interconnect Bridge (EMIB) technology is an advanced, cost-effective approach to in-package high density interconnect of heterogeneous chips, providing high density I/O, and controlled electrical interconnect paths between multiple dice in a package. In emerging architectures, it is required to scale down the EMIB die bump pitch in order to further increase the die-to-die (D2D) communication bandwidth. Aa a result, bump pitch scaling poses significant challenges in the plated solder bump reflow process, e.g., bump height / coplanarity control, solder wicking control, and bump void control. It's crucial to ensure a high-quality solder bump reflow process to meet the final product reliability requirements. In this paper, a combined formic acid based fluxless and vacuum assisted reflow process is developed for fine pitch plated solder bumping application. A high-volume production (HVM) ready tool has been developed for this process.
Technical Library | 2023-08-14 09:06:53.0
In the operation of SMT mounter, the process and integrity of the nozzle of the mounter will have a significant impact on the performance of the machine. As one of the important components of the SMT machine, it is necessary for us to carry out daily maintenance and upkeep of the SMT nozzle. To ensure that the suction nozzle of the SMT machine is intact before operation, how should we do a good job of maintaining the suction nozzle of the SMT machine during normal use? KINGSUN technical team analysis operation has the following main points: 1.Wipe the surface of the SMT nozzle with a dust-free cloth. 2.The small aperture nozzle can be passed through with a thin steel wire and then blown with an air gun. 3.The surface of the nozzle should not be soaked with corrosive solution such as alcohol, as this may cause the surface to fall off. 4.HOLDER should use a cotton swab to wipe the cavity and not damage the filter screen. 5.Regular addition of special grease to HOLDER claws. 6.According to production, it is best to regularly maintain and do other maintenance regularly. (* Suitable for Yamaha SMT machine nozzles , JUKI SMT machine nozzles, Samsung SMT machine nozzles, Panasonic SMT machine nozzles, Fuji SMT machine nozzles, Siemens SMT machine nozzles etc.) Regarding the SMT machine nozzle daily maintenance operation instructions, KINGSUN share with you here , hoping to be helpful to you. More information about Products please Contact US at jenny@ksunsmt.com or visit www.ksunsmt.com , thanks.
Technical Library | 2013-10-21 08:53:36.0
Having been in the wire processing business for 30 years, I have seen a lot of changes and improvements made possible, primarily by advances in electronics and software. Looking ahead, I see continued improvements in efficiency through networking technology.
Technical Library | 2016-11-10 08:56:54.0
It goes without saying that every manufacturer wants to ensure they are producing a quality product. Standards and specifications from various organizations provide a guideline from which manufacturers can measure different areas of quality, while also providing the end user with the reassurance that they are purchasing a trustworthy, long-lasting product. Within the wire processing industry there are many standards that manufacturers may choose or be required to adhere to. These standards and specifications are constantly evolving and increasing in detail, especially as monitoring technology improves.
Technical Library | 2013-01-30 14:02:44.0
Many OEM’s require that individual wires and cables used in their products be clearly identified with a mark or label. For some, such as in the military and aerospace markets, wire and cable identification (or “wire ID”) is mandatory and the process is governed by stringent specifications, such as SAE AS50881 (formerly MIL5088L). For others, the decision to use wire ID is a voluntary one. This article will describe what type of information is typically identified on wire and cables, concepts for improved productivity, what types of systems are available and the pros and cons of each.
Technical Library | 2017-08-31 13:43:48.0
Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields. Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction
Technical Library | 2017-09-07 13:56:11.0
As a surface finish for PCBs, Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG) was selected over Electroless Nickel/Immersion Gold (ENIG) for CMOS image sensor applications with both surface mount technology (SMT) and gold ball bonding processes in mind based on the research available on-line. Challenges in the wire bonding process on ENEPIG with regards to bondability and other plating related issues are summarized.
Technical Library | 2014-07-24 16:26:34.0
Wire bonding a die to a package has traditionally been performed using either aluminum or gold wire. Gold wire provides the ability to use a ball and stitch process. This technique provides more control over loop height and bond placement. The drawback has been the increasing cost of the gold wire. Lower cost Al wire has been used for wedge-wedge bonds but these are not as versatile for complex package assembly. The use of copper wire for ball-stitch bonding has been proposed and recently implemented in high volume to solve the cost issues with gold. As one would expect, bonding with copper is not as forgiving as with gold mainly due to oxide growth and hardness differences. This paper will examine the common failure mechanisms that one might experience when implementing this new technology.
Technical Library | 2014-12-11 18:00:09.0
The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame (...) The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared
Technical Library | 2010-04-15 20:42:44.0
The high level of current interest in embedded passives in printed circuit boards is driven by the tremendous pressure to pack more circuitry into smaller spaces. However, adoption has been limited due to design, prototyping and infrastructure issues, as well as the stability and tolerances necessary for widespread replacement of discretes. The focus of this work has been to develop a polymer thick film resistor technology to incorporate reliable organic resistors inside printed wiring boards using standard PWB processing.
.gif)
