Technical Library | 2017-09-25 10:36:52.0
Laser wire stripping was developed by NASA in the 1970s as part of the Space Shuttle program. The technology made it possible to use smaller sized wires with thinner insulations, without risk of the damage that can be caused by traditional mechanical wire stripping methods. Laser wire stripping technology was commercialized in the 1990s and was initially used for aerospace and defense applications. Laser wire stripping then grew significantly when the consumer electronics market exploded as lasers became the only stripping solution for the tiny data cables found in laptops, mobile phones and other consumer electronics products. Another large industry that has adopted laser wire stripping methods, and for good reason, is high-end medical device manufacturing.
Technical Library | 2008-04-29 15:50:45.0
The electronics industry is undergoing a materials evolution due to the pending Restriction of Hazardous Substances (RoHS) European Directive. Printed wiring board laminate suppliers, component fabricators, and printed wiring assembly operations are engaged in a multitude of investigations to determine what leadfree (Pbfree) material choices best fit their needs. The size and complexity of Pbfree implementation insures a transition period in which Pbfree and tin/lead solder finishes will be present on printed wiring assemblies
Technical Library | 2017-08-31 13:43:48.0
Wire bonded packages using conventional copper leadframe have been used in industry for quite some time. The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Proper optimization of wire bond parameters and machine settings are essential for good yields. Wire bond process can generate a variety of defects such as lifted bond, cracked metallization, poor intermetallic etc. NSOP – non-stick on pad is a defect in wire bonding which can affect front end assembly yields. In this condition, the imprint of the bond is left on the bond pad without the wire being attached. NSOP failures are costly as the entire device is rejected if there is one such failure on any bond pad. The paper presents some of the failure modes observed and the efforts to address NSOP reduction
Technical Library | 2020-08-27 01:22:45.0
Initially adopted internal specifications for acceptance of printed circuit boards (PCBs) used for wire bonding was that there were no nodules or scratches allowed on the wirebond pads when inspected under 20X magnification. The nodules and scratches were not defined by measurable dimensions and were considered to be unacceptable if there was any sign of a visual blemish on wire-bondable features. Analysis of the yield at a PCB manufacturer monitored monthly for over two years indicated that the target yield could not be achieved, and the main reasons for yield loss were due to nodules and scratches on the wirebonding pads. The PCB manufacturer attempted to eliminate nodules and scratches. First, a light-scrubbing step was added after electroless copper plating to remove any co-deposited fine particles that acted as a seed for nodules at the time of copper plating. Then, the electrolytic copper plating tank was emptied, fully cleaned, and filtered to eliminate the possibility of co-deposited particles in the electroplating process. Both actions greatly reduced the density of the nodules but did not fully eliminate them. Even though there was only one nodule on any wire-bonding pad, the board was still considered a reject. To reduce scratches on wirebonding pads, the PCB manufacturer utilized foam trays after routing the boards so that they did not make direct contact with other boards. This action significantly reduced the scratches on wire-bonding pads, even though some isolated scratches still appeared from time to time, which caused the boards to be rejected. Even with these significant improvements, the target yield remained unachievable. Another approach was then taken to consider if wire bonding could be successfully performed over nodules and scratches and if there was a dimensional threshold where wire bonding could be successful. A gold ball bonding process called either stand-off-stitch bonding (SSB) or ball-stitch-on-ball bonding (BSOB) was used to determine the effects of nodules and scratches on wire bonds. The dimension of nodules, including height, and the size of scratches, including width, were measured before wire bonding. Wire bonding was then performed directly on various sizes of nodules and scratches on the bonding pad, and the evaluation of wire bonds was conducted using wire pull tests before and after reliability testing. Based on the results of the wire-bonding evaluation, the internal specification for nodules and scratches for wirebondable PCBs was modified to allow nodules and scratches with a certain height and a width limitation compared to initially adopted internal specifications of no nodules and no scratches. Such an approach resulted in improved yield at the PCB manufacturer.
Technical Library | 2012-04-26 18:52:37.0
First presented at IPC Apex Expo 2012. The reliability, as tested by thermal cycling, of printed wire boards (PWB) are established by three variables; copper quality, material robustness and design. The copper quality was most influential and could be eva
Technical Library | 2020-11-29 22:06:45.0
Plastic laminates are increasingly used as interposers within chip packaging applications. As a component within the package, the laminate is subjected to package moisture sensitivity testing. The moisture requirements of chip packaging laminates are related to ambient moisture absorption and thermal cycling. Printed wiring board (PWB) laminates, however, are gauged on properties relating to wet processes such as resist developing, copper etching, and pumice scrubbing. Consequently, printed wiring board moisture absorption test methods differ from chip packaging test conditions.
Technical Library | 2014-12-11 18:00:09.0
The growth of portable and wireless products is driving the miniaturization of packages resulting in the development of many types of thin form factor packages and cost effective assembly processes. Wire bonded packages using conventional copper lead frame have been used in industry for quite some time. However, the demand for consumer electronics is driving the need for flip chip interconnects as these packages shorten the signals, reduce inductance and improve functionality as compared to the wire bonded packages. The flip chip packages have solder bumps as interconnects instead of wire bonds and typically use an interposer or organic substrate instead of a metal lead frame (...) The paper provides a general overview of typical defects and failure modes seen in package assembly and reviews the efforts needed to understand new failure modes during package assembly. The root cause evaluations and lessons learned as the factory transitioned to thin form factor packages are shared
Technical Library | 2012-08-02 21:05:14.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. Pure tin is a common finish for copper hook up wire, coaxial cable, ground braid and harness assemblies used on electronic assemblies. Historically there have been fewer reports o
Technical Library | 2012-08-23 21:06:35.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. Tetrabromobisphenol-A (TBBPA) is the predominant flame retardant used in rigid FR-4 printed wiring boards (PWB). In this application, the TBBPA is fully reacted into the epoxy res
Technical Library | 2013-10-21 08:53:36.0
Having been in the wire processing business for 30 years, I have seen a lot of changes and improvements made possible, primarily by advances in electronics and software. Looking ahead, I see continued improvements in efficiency through networking technology.
