Technical Library | 2018-03-28 14:54:36.0
Six decades of legacy experience makes the specification and production of screens and masks to produce repeatable precision results mostly an exercise in matching engineering needs with known ink and substrate performance to specify screen and stencil characteristics. New types of functional and electronic devices, flex circuits and medical sensors, industrial printing, ever finer circuit pitch, downstream additive manufacturing processes coupled with new substrates and inks that are not optimized for the rheological, mechanical and chemical characteristics for the screen printing process are becoming a customer driven norm. Many of these materials do not work within legacy screen making, curing or press set-up parameters. Many new materials and end uses require new screen specifications.This case study presents a DOE based method to pre-test new materials to categorize ink and substrate rheology, compatibility and printed feature requirement to allow more accurate screen recipes and on-press setting expectations before the project enters the production environment where time and materials are most costly and on-press adjustment methods may be constrained by locked, documented or regulatory processes, equipment limitations and employee experience.
Technical Library | 2015-08-20 15:18:38.0
Increasing system integration and component densities continue to significantly reduce the opportunity to access nets using standard test points. Over time the size of test points has been drastically reduced (as small as 0.5 mm in diameter) but current product design parameters have created space and access limitations that remove even the option for these test points. Many high speed signal lines have now been restricted to inner layers only. Where surface traces are still available for access, bead probe technology is an option that reduces test point space requirements as well as their effects on high speed nets and distributes mechanical loading away from BGA footprints enabling test access and reducing the risk of mechanical defects associated with the concentration of ICT spring forces under BGA devices. Building on Celestica's previous work characterizing contact resistance associated with Pr-free compatible surface finishes and process chemistry; this paper will describe experimentation to define a robust process window for the implementation of bead probe and similar bump technology that is compatible with standard Pb-free assembly processes. Test Vehicle assembly process, test methods and "Design of Experiments" will be described. Bead Probe formation and deformation under use will also be presented along with selected results.
Technical Library | 2019-05-06 23:04:05.0
The temperature and humidity test chamber simulate the temperature and humidity, so there are a lot of things customers shoud notice in the process of use, although there is detailed instruction when purchasing the equipment. But some users just know how the device works and start using it. This is very easy to cause problems in the use of the equipment, so Symor intends to describe the safety details during the use of temperature and humidity chamber. 1. Before the test, determine if the sample contains flammable and explosive substances to avoid combustion or explosion during the test. Of course, also make sure there is no flammable and explosive material around the test equipment, otherwise it may cause fire and other accidents. 2, Do not open the chamber door to operate during the experiment, or the gas in the studio may cause the operator to burn and so on. 3. At the end of the test or at the time of regular cleaning of the test chamber, power off the equipment to avoid electrocution accidents. Also, when cutting off the equipment power, pull the power cord to pull out the plug, otherwise it may lead to a rupture of the power cord and so on. You can contact manufacturers if there are some places you donnot understand, do not dismantle and repair the temperature and humidity test chamber without authorization, otherwise it may lead to more serious problems.
Technical Library | 2018-10-18 15:41:45.0
One specific market space of interest to emerging printed electronics is In Mold Label (IML) technology. IML is used in many consumer products and white good applications. When combined with electronics, the In Mold Electronics (IME) adds compelling new product functionality. Many of these products have multi-dimensional features and therefore require thermoforming processes in order to prepare the labels before they are in-molded. While thermoforming is not a novel technique for IML, the addition of printed electronic functional traces is not well documented. There is little or no published work on printed circuit performance and design interactions in the thermoforming process that could inform improved IME product designs. A general full factorial Design of Experiments (DOE) was used to analyze the electrical performance of the conductive silver ink trace/polycarbonate substrate system. Variables of interest include trace width, height of draw, and radii of both top and bottom curvatures in the draw area. Thermoforming tooling inserts were fabricated for eight treatment combinations of these variables. Each sample has one control and two formed strips. Electrical measurements were taken of the printed traces on the polymer sheets pre- and post- forming with a custom fixture to evaluate the effect on resistance. The design parameters found to be significant were draw height and bottom radius, with increased draw and smaller bottom curvature radii both contributing to the circuits’ resistance degradation. Over the ranges evaluated, the top curvature radii had no effect on circuit resistance. Interactions were present, demonstrating that circuit and thermoforming design parameters need to be studied as a system. While significant insight impacting product development was captured further work will be executed to evaluate different ink and substrate material sets, process variables, and their role in IME.
Technical Library | 2021-07-20 20:02:29.0
During the manufacturing of printed circuit boards (PCBs) for a Flight Project, it was found that a European manufacturer was building its boards to a European standard that had no requirement for copper wrap on the vias. The amount of copper wrap that was measured on coupons from the panel containing the boards of interest was less than the amount specified in IPC-6012 Rev B, Class 3. To help determine the reliability and usability of the boards, three sets of tests and a simulation were run. The test results, along with results of simulation and destructive physical analysis, are presented in this paper. The first experiment involved subjecting coupons from the panels supplied by the European manufacturer to thermal cycling. After 17 000 cycles, the test was stopped with no failures. A second set of accelerated tests involved comparing the thermal fatigue life of test samples made from FR4 and polyimide with varying amounts of copper wrap. Again, the testing did not reveal any failures. The third test involved using interconnect stress test coupons with through-hole vias and blind vias that were subjected to elevated temperatures to accelerate fatigue failures. While there were failures, as expected, the failures were at barrel cracks. In addition to the experiments, this paper also discusses the results of finite-element analysis using simulation software that was used to model plated-through holes under thermal stress using a steady-state analysis, also showing the main failure mode was barrel cracking. The tests show that although copper wrap was sought as a better alternative to butt joints between barrel plating and copper foil layers, manufacturability remains challenging and attempts to meet the requirements often result in features that reduce the reliability of the boards. Experimental and simulation work discussed in this paper indicate that the standard requirements for copper wrap are not contributing to the overall board reliability, although it should be added that a design with a butt joint is going to be a higher risk than a reduced copper wrap design. The study further shows that procurement requirements for wrap plating thickness from Class 3 to Class 2 would pose little risk to reliability (minimum 5 μm/0.197 mil for all via types).Experimental results corroborated by modeling indicate that the stress maxima are internal to the barrels rather than at the wrap location. In fact, the existence of Cu wrap was determined to have no appreciable effect on reliability.
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