Industry News: causes of solder mask lifting (Page 1 of 1)

MIRTEC to Exhibit Complete Line of Technologically Advanced 3D AOI and SPI Inspection Systems at IPC APEX 2020

Industry News | 2020-01-06 16:06:59.0

MIRTEC will premier its complete line of 3D AOI and SPI Inspection Systems in Booth #1900 at the 2020 IPC APEX EXPO. The premier technical conference and exhibition for the electronics manufacturing industry will take place Feb. 4-6, 2020 at the San Diego Convention Center.

MIRTEC Corp

SMTconnect 2022 - heartbeats of electronic production quicken

Industry News | 2022-05-05 17:10:49.0

SMTconnect, which will take place from 10-12 May in Nuremberg offers a highly relevant program for visitors to the exhibition. With important exhibitors in the industry showcasing their latest developments, the fair provides an opportunity to connect, create and drive technology.

SMTConnect

Why use Via in Pad Design?

Industry News | 2019-11-05 22:08:21.0

Via in pad is the design practice of placing a via in the copper landing pad of a component. Compared to standard PCB via routing, via in pad allows a design to use smaller component pitch sizes and further reduce the PCBs overall size. With component manufactures pushing smaller parts every year and the demand from consumers for smaller devices, the usage of via in pad practices by hardware engineers have become more commonplace. In this article, we will discuss the differences between via in pad and traditional vias, when should you use via in pad, and how to design for it.

Headpcb

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