Minimizing Voiding In QFN Packages Using Solder Preforms SMTnet Express July 27, 2012, Subscribers: 25333, Members: Companies: 8933, Users: 33366 Minimizing Voiding In QFN Packages Using Solder Preforms First published in the 2012 IPC APEX EXPO
Malaysia Reflow soldering in a nitrogen atmospher
SMTnet Express, June 12, 2014, Subscribers: 22834, Members: Companies: 13899, Users: 36331 Instrumentation for Studying Real-time Popcorn Effect in Surface Mount Packages during Solder Reflow Arijit Roy; World Academy of Science, Engineering
New Methods of Testing PCB Traces Capacity and Fusing New Methods of Testing PCB Traces Capacity and Fusing by: Norocel Codreanu, Radu Bunea, Paul Svasta; "Politehnica" University of Bucharest, Center for Technological Electronics
