Electronics Forum | Sat May 05 08:00:54 EDT 2007 | davef
Continuing with CF's point on mixed alloy processing of BGA, look here: http://www.aciusa.org/leadfree/LFS_SUMMIT-PDF/09_HILLMAN_Rockwell_Collins_BGA.pdf
Electronics Forum | Thu Oct 22 22:01:33 EDT 2020 | SMTA-64386500
Hi John - send me an email (david.hillman@collins.com) and I can send you a few photos of what Mike K. was describing in terms of the solder joint surface being "etched" by the cleaning solution. The dull appearance is due to the abundance of lead o
Industry News | 2008-03-05 22:46:03.0
This 90 minute webcast will feature noted speakers Dr. Craig Hillman, DfR Solutions, and Mumtaz Bora, Kyocera Wireless Corporation. Dr. Hillman will review the prospect of in-house testing.
Industry News | 2018-03-01 19:13:43.0
In recognition and acknowledgement of his extraordinary contributions to IPC and the electronics industry, Dave Hillman, Rockwell Collins, was presented with the IPC Raymond E. Pritchard Hall of Fame Award at IPC APEX EXPO on Tuesday, February 27 at the San Diego Convention Center. IPC’s most prestigious award, the Hall of Fame is given to individuals who have provided exceptional service and advancement to IPC and the electronics industry.
Technical Library | 2023-01-17 17:22:28.0
The impact of voiding on the solder joint integrity of ball grid arrays (BGAs)/chip scale packages (CSPs) can be a topic of lengthy and energetic discussion. Detailed industry investigations have shown that voids have little effect on solder joint integrity unless they fall into specific location/geometry configurations. These investigations have focused on thermal cycle testing at 0°C-100°C, which is typically used to evaluate commercial electronic products. This paper documents an investigation to determine the impact of voids in BGA and CSP components using thermal cycle testing (-55°C to +125°C) in accordance with the IPC- 9701 specification for tin/lead solder alloys. This temperature range is more typical of military and other high performance product use environments. A proposed BGA void requirement revision for the IPC-JSTD-001 specification will be extracted from the results analysis.
Technical Library | 2023-01-17 17:19:44.0
A test program was developed to evaluate the effectiveness of vacuum reflow processing on solder joint voiding and subsequent thermal cycling performance. Area array package test vehicles were assembled using conventional reflow processing and a solder paste that generated substantial void content in the solder joints. Half of the population of test vehicles then were re-processed (reflowed) using vacuum reflow. Transmission x-ray inspection showed a significant reduction in solder voiding after vacuum processing. The solder attachment reliability of the conventional and vacuum reflowed test vehicles was characterized and compared using two different accelerated thermal cycling profiles. The thermal cycling results are discussed in terms of the general impact of voiding on solder thermal fatigue reliability, results from the open literature, and the evolving industry standards for solder voiding. Recommendations are made for further work based on other void reduction methods and additional reliability studies.
Events Calendar | Wed Jul 19 00:00:00 EDT 2023 - Wed Jul 19 00:00:00 EDT 2023 | ,
SMTA Webinar: Secure, Intelligent, Detailed Design Data Exchange Between Design & Manufacturing
SMTnet Express, August 7, 2014, Subscribers: 23058, Members: Companies: 13975, Users: 36604 Gold Embrittlement In Lead-Free Solder. Craig Hillman, Nathan Blattau, Joelle Arnold, Thomas Johnston, Stephanie Gulbrandsen; DfR Solutions , Julie Silk
Heller 公司 | http://hellerindustries.com.cn/Vacuum-Void-Reduction-Reflow.pdf
]. That position is supported by results from several studies in which macrovoids did not reduce board level reliability [11-13]. Independent investigations by Sethuraman [14], Coyle [15], and Hillman [16
