Electronics Forum | Wed Mar 15 08:47:50 EDT 2017 | emeto
From what I know, you should follow IPC standard for the class assembly that you are building. From your post somebody mentioned something somewhere - doesn't make it official information. I would not be worried about having voids, but what is their
Electronics Forum | Tue May 01 20:40:38 EDT 2018 | sarason
In the past I have worked on 600 Amp FET Blocks. The rule was no voids. The circuit board would be heavy copper. 4 times normal plating time. Not particularly high resolution on the board say 20 mils. To help with the heavy plating. The boards were t
Defect Free QFN Assembly Defect Free QFN Assembly The problem with soldering QFN packages is that they float, skew and tilt on the 'domed' melted solder during the SMT re-flow process. This floating, skewing and/or tilting will lead to solder
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