Electronics Forum | Wed Nov 08 19:49:41 EST 2006 | davef
Dr. Brian Toleno wrote that section of the posting that I pasted onto the forum. Try: * �Lead-free Soldering Backward Compatibility�, Pan, et al., IPC/JEDEC Pb-free Conference, San Jose, 2006 * Checking with http://www.ipc.org * Contacting Jianbia
Industry News | 2011-01-20 13:45:14.0
IPC will introduce a cyber conference at IPC APEX EXPO in Las Vegas in 2011. The IPC APEX EXPO Cyber Conference will feature live broadcasts and post-show archives of seven of the show's thirty-five technical conference sessions on April 12–14, 2011.
Industry News | 2009-07-21 11:50:50.0
Upholding its pledge to support educational advance that promotes electronics innovation, DEK announces that it has donated a Horizon 03i printing system to California Polytechnic State University (Cal Poly), San Luis Obispo, further enabling the institution’s “learn by doing” approach.
Technical Library | 2023-01-17 17:27:13.0
Reflow profile has significant impact on solder joint performance because it influences wetting and microstructure of the solder joint. The degree of wetting, the microstructure (in particular the intermetallic layer), and the inherent strength of the solder all factor into the reliability of the solder joint. This paper presents experimental results on the effect of reflow profile on both 63%Sn 37%Pb (SnPb) and 96.5%Sn 3.0%Ag 0.5%Cu (SAC 305) solder joint shear force. Specifically, the effect of the reflow peak temperature and time above solder liquidus temperature are studied. Nine reflow profiles for SAC 305 and nine reflow profiles for SnPb have been developed with three levels of peak temperature (230 o C, 240 o C, and 250 o C for SAC 305; and 195 o C, 205 o C, and 215 o C for SnPb) and three levels of time above solder liquidus temperature (30 sec., 60 sec., and 90 sec.). The shear force data of four different sizes of chip resistors (1206, 0805, 0603, and 0402) are compared across the different profiles. The shear force of the resistors is measured at time 0 (right after assembly). The fracture surfaces have been studied using a scanning electron microscopy (SEM) with energy dispersive spectroscopy (EDS)
Technical Library | 2010-03-30 21:51:23.0
This paper presents the drop test reliability results for edge-bonded 0.5mm pitch lead-free chip scale packages (CSPs) on a standard JEDEC drop reliability test board.
SMTnet Express August 29, 2013, Subscribers: 26233, Members: Companies: 13474, Users: 35110 Effect of Gold Content on the Microstructural Evolution of SAC305 Solder Joints Under Isothermal Aging by Mike Powers, Jianbiao Pan, Julie Silk, Patrick
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