Electronics Forum | Wed May 30 22:13:45 EDT 2012 | davef
Richard Lathrop, technical service manager, SMT materials, Heraeus Circuit Materials Division, may be contacted at (610) 825-6050, ext. 265; e-mail: rlathrop@4cmd.com.
Electronics Forum | Wed Feb 06 14:55:15 EST 2013 | davef
I doubt anyone will send you the gerbers for the Benchmarker board. Here are my notes on the board: BENCHMARKER II TEST BOARD * Heraeus Materials Technology LLC [Benchmarker II test board that streamlined material testing for rapid customer support,
Technical Library | 1999-04-15 06:54:01.0
High-speed printing techniques are revealed that break the speed barrier resulting from air entrapment in large apertures at fast squeegee speeds. Adhesive printability test results using conventional thickness stencils to achieve a significant range of d
Technical Library | 2013-02-08 22:56:47.0
Solder voiding is present in the majority solder joints and is generally accepted when the voids are small and the total void content is minimal. X-ray methods are the predominate method for solder void analysis but this method can be quite subjective for non grid array components due to the two dimensional aspects of X-ray images and software limitations. A novel method of making a copper "sandwich" to simulate under lead and under component environs during reflow has been developed and is discussed in detail. This method has enabled quantitative solder paste void analysis for lead free and specialty paste development and process refinement. Profile and paste storage effects on voiding are discussed. Additionally an optimal design and material selection from a solder void standpoint for a heat spreader on a BCC (Bumpered Chip Carrier) has been developed and is discussed.
SMTnet Express, August 17, 2017, Subscribers: 30,720, Companies: 10,649, Users: 23,665 The Effect of Vacuum Reflow Processing On Solder Joint Voiding And Thermal Fatigue Reliability Richard Coyle, Richard Popowich, Charmaine Johnson - Nokia Bell
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