Industry Directory | Manufacturer
Shuttle Star Technology designs and builds advanced off-line 2.5D&3D x-ray inspection systems for solder joint and final assembly test inspection in SMT&EMS. It uses world-class X-ray techniques with advanced defect detection.
New Equipment | Test Equipment
Military-style laboratory services to validate bare boards for product assurance. Testing for delamination, voids, copper thickness, hole quality, proper stack-up, etc. Customer receives all cross-section pucks, boards and laboratory report with reco
New Equipment | Education/Training
Bob Willis has an extensive range of training videos available online. The complete video collection is available to view online for a fixed fee, based on a six month period. After purchase you are provided with links to each of the online videos for
Electronics Forum | Thu Jun 02 08:42:06 EDT 2016 | emeto
Several important things to watch. 1. More paste can result in more voiding(I usually shoot for 50-65% coverage) 2. Make a different grid(windowpane) for you pad - try with more smaller windows 3. Try both ramp to spike or Soak profiles and see whic
Electronics Forum | Thu Jun 02 22:40:13 EDT 2016 | slouis2014
Hi, yes have a few experiments initially i tried to increase the solder volume but component pin have insufficient solder. 1. The solder coverage do you calculate it by solder volume or solder area. 2. if i would achieve as you recommend 50-60 % woul
Industry News | 2016-01-17 19:26:58.0
In order to keep up with industry demand, IPC has released amendments for J-STD-001F, Requirements for Soldered Electrical and Electronic Assemblies, and IPC-A-610F, Acceptability of Electronic Assemblies. For each standard, IPC-A-610F Amendment 1 and IPC J-STD-001F Amendment 1 represents a critical shift to deliver necessary updates to these already robust standards.
Industry News | 2012-05-04 09:21:15.0
As printed boards evolve and chip speeds increase, the use of microwave technology in commercial applications, such as cell phone towers and in military products, is expanding.
Technical Library | 2019-10-10 00:26:28.0
Voids are a plague to our electronics and must be eliminated! Over the last few years we have studied voiding in solder joints and published three technical papers on methods to "Fill the Void." This paper is part four of this series. The focus of this work is to mitigate voids for via in pad circuit board designs. Via holes in Quad Flat No-Lead (QFN) thermal pads create voiding issues. Gasses can come out of via holes and rise into the solder joint creating voids. Solder can also flow down into the via holes creating gaps in the solder joint. One method of preventing this is via plugging. Via holes can be plugged, capped, or left open. These via plugging options were compared and contrasted to each other with respect to voiding. Another method of minimizing voiding is through solder paste stencil design. Solder paste can be printed around the via holes with gas escape routes. This prevents gasses from via holes from being trapped in the solder joint. Several stencil designs were tested and voiding performance compared and contrasted. In many cases voiding will be reduced only if a combination of mitigation strategies are used. Recommendations for combinations of via hole plugging and stencil design are given. The aim of this paper is to help the reader to "Fill the Void."
Technical Library | 2013-01-24 19:16:35.0
The electronics industry has mainly adopted the higher melting point Sn3Ag0.5Cu solder alloys for lead-free reflow soldering applications. For applications where temperature sensitive components and boards are used this has created a need to develop low melting point lead-free alloy solder pastes. Tin-bismuth and tin-bismuth-silver containing alloys were used to address the temperature issue with development done on Sn58Bi, Sn57.6Bi0.4Ag, Sn57Bi1Ag lead-free solder alloy pastes. Investigations included paste printing studies, reflow and wetting analysis on different substrates and board surface finishes and head-in-pillow paste performance in addition to paste-in-hole reflow tests. Voiding was also investigated on tin-bismuth and tin-bismuth-silver versus Sn3Ag0.5Cu soldered QFN/MLF/BTC components. Mechanical bond strength testing was also done comparing Sn58Bi, Sn37Pb and Sn3Ag0.5Cu soldered components. The results of the work are reported.
ACI Technologies Inc. (ACI) is a scientific research corporation dedicated to the advancement of electronics manufacturing processes and materials for The Department of Defense and industry. This video provides an overview of our commercial service
This video describes the IPC A-600 training and certification program. The IPC A-600 specification is a set of acceptability specifications for printed circuit boards. These standards determine the acceptance and reject criteria for printed wiring bo
Training Courses | | | IPC-6012 Specialist (CIS)
The Certified IPC-6012 Specialist (CIS) training covers design, fabrication and inspection of rigid printed boards.
Training Courses | | | IPC-600 Specialist (CIS)
The Certified IPC-600 Specialist (CIS) training targets quality assurance and acceptance of bare printed circuit boards.
SMTnet Express, December 16, 2017, Subscribers: 31,015, Companies: 10,789, Users: 24,054 Controlling Voiding Mechanisms in the Reflow Soldering Process Keith Sweatman, Takatoshi Nishimura, Kenichiro Sugimoto, Akira Kita; Nihon Superior Co., Ltd
SMTnet Express, January 5, 2014, Subscribers: 23,708, Members: Companies: 14,158 , Users: 37,476 The Last Will And Testament of the BGA Void Dave Hillman, Dave Adams, Tim Pearson, Brad Williams, Brittany Petrick, Ross Wilcoxon - Rockwell Collins
Heller 公司 | http://hellerindustries.com.cn/Vacuum-Void-Reduction-Reflow.pdf
. Area array package test vehicles were assembled using conventional reflow processing and a solder paste that generated substantial void content in the solder joints
Heller Industries Inc. | https://hellerindustries.com/wp-content/uploads/2018/07/Vacuum-Void-Reduction-Reflow.pdf
. Area array package test vehicles were assembled using conventional reflow processing and a solder paste that generated substantial void content in the solder joints
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