Electronics Forum | Fri Dec 10 10:25:59 EST 1999 | Wolfgang Busko
Hi Larry, you might find something looking for the thread "D-Pak misalignment Problem - Kantesh Doss 23:43:23 12/02/1999" Good luck Wolfgang
Electronics Forum | Tue Nov 14 13:39:37 EST 2000 | Mark S
Hi All -- I'm about to design a DPAK part (case 369A-13, Issue Z)onto a PCB . The part's maximum length as given in the datasheets (On-Semi MAC4DHM) is 0.030" longer than the recommended land pattern as given in that same datasheet. (1) Has anybod
Industry News | 2020-03-08 16:11:27.0
From factory of the future advancements displayed on the show floor to expert insights conveyed in technical conference sessions and professional development courses, IPC APEX EXPO 2020 provided the education and networking connections that helped 8,516 visitors (attendee and exhibitor personnel) from 61 countries address today's business challenges and prepare for the future.
Industry News | 2019-02-12 19:51:16.0
From revolutionary advancements to expert insights, IPC APEX EXPO 2019 provided education, Buzz sessions, professional development courses and connections fostered in the technical conference, enabling 5,292 attendees from 56 countries prepare for the future. The 440 exhibitors welcomed a busy three days of business development and qualified sales leads on 150,400 net square feet of show floor space. IPC APEX EXPO attracted 9,796 total visitors including attendees and exhibitor personnel.
Technical Library | 2006-05-13 13:07:53.0
This Excel Spreadsheet calculates the Wave Solder Contact Time automatically with given main Solder Wave width and Conveyor Speed. There is one chart where conveyor speed is expressed in meters/min and in another where it is expressed in feet/minute.
Technical Library | 2023-04-17 21:17:59.0
The purpose of this paper is to evaluate and compare the effectiveness and sensitivity of different cleanliness verification tests for post soldered printed circuit board assemblies (PCBAs) to provide an understanding of current industry practice for ionic contamination detection limits. Design/methodology/approach – PCBAs were subjected to different flux residue cleaning dwell times and cleanliness levels were verified with resistivity of solvent extract, critical cleanliness control (C3) test, and ion chromatography analyses to provide results capable of differentiating different sensitivity levels for each test. Findings – This study provides an understanding of current industry practice for ionic contamination detection using verification tests with different detection sensitivity levels. Some of the available cleanliness monitoring systems, particularly at critical areas of circuitry that are prone to product failure and residue entrapment, may have been overlooked. Research limitations/implications – Only Sn/Pb, clean type flux residue was evaluated. Thus, the current study was not an all encompassing project that is representative of other chemistry-based flux residues. Practical implications – The paper provides a reference that can be used to determine the most suitable and effective verification test for the detection of ionic contamination on PCBAs. Originality/value – Flux residue-related problems have long existed in the industry. The findings presented in this paper give a basic understanding to PCBA manufacturers when they are trying to choose the most suitable and effective verification test for the detection of ionic contamination on their products. Hence, the negative impact of flux residue on the respective product's long-term reliability and performance can be minimized and monitored effectively.
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