Technical Library | 2019-05-30 11:04:03.0
There exists a need to efficiently remove heat from power electronics within power systems to enhance performance. Thermal management is a critical function to that operation. Reducing the junction temperature of semiconductor power electronic devices enables them to operate at higher currents. Lowering operating temperatures reduces the thermal stress on electronic devices, which improves efficiency and reduces failures. To improve the heat removal process, the current heat transfer design of a power system has been analyzed and a variety of thermal interface materials (TIMs) and cold plate technologies have been evaluated. This paper will review some of these results.
Technical Library | 2013-09-05 17:44:14.0
Surface plasmon polaritons (SPPs) are localized surface electromagnetic waves that propagate along the interface between a metal and a dielectric. Owing to their inherent subwavelength confinement, SPPs have a strong potential to become building blocks of a type of photonic circuitry built up on 2D metal surfaces; however, SPPs are difficult to control on curved surfaces conformably and flexibly to produce advanced functional devices. Here we propose the concept of conformal surface plasmons (CSPs), surface plasmon waves that can propagate on ultrathin and flexible films to long distances in a wide broadband range from microwave to mid-infrared frequencies.
Technical Library | 2014-05-01 15:14:12.0
Bilayer graphene has been a subject of intense study in recent years. The interlayer registry between the layers can have dramatic effects on the electronic properties: for example, in the presence of a perpendicular electric field, a band gap appears in the electronic spectrum of so-called Bernal-stacked graphene. This band gap is intimately tied to a structural spontaneous symmetry breaking in bilayer graphene, where one of the graphene layers shifts by an atomic spacing with respect to the other. This shift can happen in multiple directions, resulting in multiple stacking domains with soliton-like structural boundaries between them
Technical Library | 1999-05-07 10:11:55.0
The Intel StrataFlashTM memory technology represents a cost breakthrough for flash memory devices by enabling the storage of two bits of data in a single flash memory transistor. This paper will discuss the evolution of the two bit/cell technology from conception to production.
Technical Library | 2009-12-03 14:27:29.0
This paper provides additional data in support of shelf life extension for BGA and Die Size BGA (DSBGA) Packages.
Technical Library | 2010-03-25 06:26:37.0
The complexity of Printed Circuit Assembly process is increasing day by day and causing productivity issues in the industry, introducing ultra fine pitch components (pitch less than 15mil) in PCA is a challenge to minimize risk of defects as solder short, dry solder. This paper is focusing on minimizing these defects.
Technical Library | 2009-12-03 12:51:58.0
Each year the semiconductor industry routes a significant volume of devices to recycling sites for no reliability or quality rationale beyond the fact that those devices were stored on a warehouse shelf for two years. This study identifies the key risks attributed to extended storage of devices in uncontrolled indoor environments and the risk mitigation required to permit safe shelf-life extension.
Technical Library | 2013-04-25 11:42:01.0
Specification and control of surface roughness of copper conductors within printed circuit boards (PCBs) are increasingly desirable in multi-GHz designs as a part of signal-integrity failure analysis on high-speed PCBs. The development of a quality-assurance method to verify the use of foils with specified roughness grade during the PCB manufacturing process is also important... First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2016-11-03 17:53:56.0
We present a novel method for fabricating a high-density carbon nanotube microelectrode array (MEA) chip. Vertically aligned carbon nanotubes (VACNTs) were synthesized by microwave plasma-enhanced chemical vapor deposition and thermal chemical vapor deposition. The device was characterized using electrochemical experiments such as cyclic voltammetry, impedance spectroscopy and potential transient measurements. Through-silicon vias (TSVs) were fabricated and partially filled with polycrystalline silicon to allow electrical connection from the high-density electrodes to a stimulator microchip.In response to the demand for higher resolution implants, we have developed a unique process to obtain a high-density electrode array by making the microelectrodes smaller in size and designing new ways of routing the electrodes to current sources.