Electronics Forum | Mon Dec 22 16:02:22 EST 1997 | Justin Medernach
| what is your experience about the presence of the voids in the joints ? | Are they dangerous and when ? Vincenzo, Voids in solder joints can be caused by a number of factors. Let's begin with the flux vehicle in your soldering media. If the prope
Electronics Forum | Thu Feb 19 12:52:08 EST 1998 | Earl Moon
| what is your experience about the presence of the voids in the joints ? | Are they dangerous and when ? My specifications require rejection and study if voiding exceeds 2% of solder joint volume measured using x-ray and/or x-sectional analysis. My
Industry News | 2019-10-16 14:45:19.0
MIRTEC announces that the company will premier its all-new ALPHA 3D Automated Optical Inspection System at productronica 2019. New to this event, Messe München and Konradin Verlag have organized a 3D AOI Arena in Hall A2. Leading 3D AOI manufacturers such as MIRTEC will demonstrate their latest 3D Inspection Technology at this four-day event scheduled to take place Nov. 12-15, 2019, at the Munich Trade Fair Center in Munich, Germany.
Industry News | 2015-05-07 19:28:29.0
MIRTEC announce a new strategic cooperation that will empower yield improvement in the electronics manufacturing industry.
Technical Library | 2013-12-27 10:39:21.0
The head-in-pillow defect has become a relatively common failure mode in the industry since the implementation of Pb-free technologies, generating much concern. A head-in-pillow defect is the incomplete wetting of the entire solder joint of a Ball-Grid Array (BGA), Chip-Scale Package (CSP), or even a Package-On-Package (PoP) and is characterized as a process anomaly, where the solder paste and BGA ball both reflow but do not coalesce. When looking at a cross-section, it actually looks like a head has pressed into a soft pillow. There are two main sources of head-in-pillow defects: poor wetting and PWB or package warpage. Poor wetting can result from a variety of sources, such as solder ball oxidation, an inappropriate thermal reflow profile or poor fluxing action. This paper addresses the three sources or contributing issues (supply, process & material) of the head-in-pillow defects. It will thoroughly review these three issues and how they relate to result in head-in pillow defects. In addition, a head-in-pillow elimination plan will be presented with real life examples will be to illustrate these head-in-pillow solutions.
Technical Library | 2017-11-15 22:49:14.0
While a significant level of voiding can be tolerated in solder joints where electrical conductivity is the main requirement, voiding at any level severely compromises thermal conductivity. For example, in LED lighting modules effective conduction of heat through the 1st level die attach to the substrate and then through the 2nd level attach to the heat sink is critical to performance so that voiding in the solder joints at both levels must be minimized. (...) In this paper, the authors will review the factors that influence the incidence of voids in small and large area solder joints that simulate, respectively, the 1st and 2nd level joints in LED modules and discuss mitigation strategies appropriate to each level. They will also report the results of a study on the effect on the incidence of voids of flux medium formulation and the optimization of the thermal profile to ensure that most of the volatiles are released early in the reflow process.
Lyra Reflow Oven is a soft soldering that realizes the mechanical and electrical connection between the solder ends of surface mount components or the pins and the printed board pads by remelting the solder paste pre-distributed on the printed board
Events Calendar | Mon Jan 14 00:00:00 EST 2019 - Mon Jan 14 00:00:00 EST 2019 | ,
Webinar: Crimp Inspection, Quality Control in the Real World of Manufacture
Events Calendar | Thu Aug 23 00:00:00 EDT 2018 - Thu Aug 23 00:00:00 EDT 2018 | ,
Strain Gauge Data Can Be Misleading | Predicting Strain Levels Caused by Mounting PCBs in Housing Using the ICT Analysis Feature of Sherlock
| https://www.eptac.com/blog/are-voids-in-solder-joints-really-an-issue
? Posted on 5st June, 2012 by Mark Pilkington Well I’ve got to say it again, what is wrong with the existence of voids in solder joints
Surface Mount Technology Association (SMTA) | https://www.smta.org/knowledge/proceedings_abstract.cfm?PROC_ID=4996
Investigation of the Influence of Voids n the Reliability of Solder Joints by Finite Element Method 中文 MEMBERS LOGIN Membership Become a Member
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