Technical Library | 2012-11-21 18:57:58.0
The continuing evolution toward advanced miniature packaging has led to ever increasing PCB density and complexity. As the manufacturing process becomes progressively more complicated, there is an ever increasing probability for defects to occur on finished PCB assemblies. For years the Automated Optical Inspection (AOI) industry has relied solely upon two-dimensional (2D) inspection principles to test the quality of workmanship on electronic assemblies. While advancements in conventional 2D optical inspection have made this technology suitable for detecting such defects as missing components, wrong components, proper component orientation, insufficient solder, and solder bridges; there is an inherent limitation in the ability to inspect for co-planarity of ultra-miniature chips, leaded device, BGA and LED packages.
Technical Library | 2009-03-27 22:22:40.0
The Sn-Ag-Cu (SAC) alloys have been considered promising replacements for the lead-containing solders for the microelectronics applications. However, due to the rigidity of the SAC alloys, compared with the Pb-containing alloys, more failures have been found in the drop and high impact applications for the portable electronic devices, such as the personal data assistant (PDA), cellular phone, notebook computer..etc
Technical Library | 2013-05-23 17:41:21.0
Printed Electronics is considered by many international technologists to be a platform for manufacturing innovation. Its rich portfolio of advanced multi-functional nano-designed materials, scalable ambient processes, and high volume manufacturing technologies lends itself to offer an opportunity for sustained manufacturing innovation. The success of introducing a new manufacturing technology is strongly dependent on the ability to achieve high final product yields at current or reduced cost. In the past, standards have been the critical vehicles to enable manufacturing success... First published in the 2012 IPC APEX EXPO technical conference proceedings.
Technical Library | 2014-01-09 16:40:33.0
Embedded Passive Technology is a viable technology that has been reliably used in the defense and aerospace industry for over 20 years. Embedded Passive (Resistors and Capacitors) Technology have a great potential for high frequency and high density applications. It also provides better signal performance, reduced parasitic and cross talk. This paper summarizes the selection of resistor embedded materials, evaluations of resistive material (Phase 1) and duplication of a complex digital design (Phase 2). Phase 1 –resistive materials (Foil 25Ω/sq NiCr and 1kΩ/sq CrSiO) and resistive-Ply materials (25Ω/sq and 250Ω/sq NiP) were chosen for evaluation.
Technical Library | 2020-01-01 17:06:52.0
The majority of electronic failures occur due to thermally induced stresses and strains caused by excessive differences in coefficients of thermal expansion (CTE) across materials.CTE mismatches occur in both 1st and 2nd level interconnects in electronics assemblies. 1st level interconnects connect the die to a substrate. This substrate can be underfilled so there are both global and local CTE mismatches to consider. 2nd level interconnects connect the substrate, or package, to the printed circuit board (PCB). This would be considered a "board level" CTE mismatch. Several stress and strain mitigation techniques exist including the use of conformal coating.
Technical Library | 2012-10-11 19:50:09.0
First published in the 2012 IPC APEX EXPO technical conference proceedings. This paper shows the benefits by using a pure palladium Layer in the ENEPIG (Electroless Nickel, Electroless Palladium, Immersion Gold) and ENEP (Electroless Nickel, Electroless P
Technical Library | 2010-05-12 16:21:05.0
Numerous studies have shown that greater than 60% of end of line defects in SMT assembly can be traced to solder paste and the printing process. Reflowing adds another 15% or so. In light of this fact, it is surprising that no simplified procedure for solder paste evaluation has been documented. This paper is about such a procedure.
Technical Library | 2014-05-01 15:14:12.0
Bilayer graphene has been a subject of intense study in recent years. The interlayer registry between the layers can have dramatic effects on the electronic properties: for example, in the presence of a perpendicular electric field, a band gap appears in the electronic spectrum of so-called Bernal-stacked graphene. This band gap is intimately tied to a structural spontaneous symmetry breaking in bilayer graphene, where one of the graphene layers shifts by an atomic spacing with respect to the other. This shift can happen in multiple directions, resulting in multiple stacking domains with soliton-like structural boundaries between them
Technical Library | 2011-12-08 17:46:42.0
The past few years have brought PCB assemblers a multitude of choices for SMT stencil materials and coatings. In addition to the traditional laser-cut stainless steel (SS) or electroformed nickel, choices now include SS that has been optimized for laser c
Technical Library | 2015-04-02 20:12:58.0
The demands on volume delivery and positioning accuracy for solder paste deposits are increasing as the size and complexity of circuits continue to develop in the electronics industry. According to the iNEMI 2013 placement accuracy for these kinds of components will reach 6 sigma placement accuracy in X and Y of 30 um by 2023.This study attempts to understand the dependencies on piezo actuation pulse profile on jetting deposit quality, especially focused on positioning, satellites and shape. The correlation of deposit diameter and positioning deviation as a function of piezo actuation profile shows that positioning error for deposits increase almost monotonically with decreasing droplet volume irrespective of the piezo-actuation profile. The trends for shape and satellite levels are not as clear and demand further study.