Electronics Forum | Thu Sep 30 12:02:20 EDT 1999 | Wolfgang Busko
| I am having problems processing immersion gold boards. The achieved solder joints appear acceptable a la IPC-A-610, but the resultant joint does not fully cover the land, i.e. you can still see an outline of gold pad. | What is the best way to achi
Electronics Forum | Thu Aug 26 10:28:07 EDT 1999 | Stuart Adams
What are the key steps to achieving high yield with CSP ??? (We are trying qualify vendors for volume fab/assembly of some products which use several CSP devices on each side of the board. (Some with 0.5mm ball pitch)) Looking through the forum I
Electronics Forum | Fri Aug 27 13:24:19 EDT 1999 | swsng
| What are the key steps to achieving high yield with CSP ??? | | (We are trying qualify vendors for volume fab/assembly of some | products which use several CSP devices on each side of the | board. (Some with 0.5mm ball pitch)) | | Looking throu
Electronics Forum | Fri Oct 05 08:35:52 EDT 2001 | Hussman
Hey Steven, Achieving the proper profile like you described does require you to engineer proper conveyor speeds and zone temps. Most conveyorized ovens have the inside of the ovens divided into zones. Each zone has a top and bottom heater that can
Electronics Forum | Wed Apr 10 11:55:58 EDT 2002 | Yngwie
Temp/Humidity requirement for baking normally specified at : Low Temp baking : 40 deg C at 5% RH High temp Baking: 125 Deg C at 5% RH. The problem here is the 5% ? Although the 5% is achievable with a special Oven, can someone explain why is it 5%
Electronics Forum | Mon Nov 25 09:06:15 EST 2002 | jax
You might want to check the tin thickness. I believe you have a minimum of .65 microns in order to achieve a good solder joint through 3 thermal passes. In an immersion tin process, the ability to solder is time and temperature dependant. As the int
Electronics Forum | Mon Feb 03 22:48:00 EST 2003 | vinesh
Hi all, We are using small CSPs (10x10mm) in one of our products which has a big ground pad in the center (7x7mm). The maximum voiding allowed on this big pad is also no greater than 25% which we are finding very hard to achieve. The centre pad ha
Electronics Forum | Wed Mar 08 15:12:41 EST 2006 | aj
All, I have a problem on a new device that we have on a new product. It is a LLP (Leadless Leadframe Package) if you search in google "sda16a" you can see one. I am finding it next to impossible to consistently achieve a good visible solder fillet
Electronics Forum | Tue Apr 25 22:16:31 EDT 2006 | KEN
I agree with Russ. The problem is your thermal isolation is so small 1/16 inch. Also, most ovens measure temperaure in the plenum. You don't solder in the plenum. Therefore, you have a intermidiate "zone" temp. mixing between the top and bottom
Electronics Forum | Sat May 27 17:21:43 EDT 2006 | smt_guru
Efren, Allow me to make some recommendations. This is my firm's bread and butter, so to speak. Helping startups like yourself achieve their budget objectives, but in the process being innovative and thinking outside of the box. Here are my sugges
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