Electronics Forum | Wed Jan 22 19:37:48 EST 2003 | bradlanger
My company is getting into smt and am looking for advice on placement equipment. Our largest board is 7" x 13". The smallest parts are 0805, we only have soic so far and our volume is low to mid scale. Who makes a accurate, reliable, versitile, small
Electronics Forum | Wed Jan 22 19:41:03 EST 2003 | bradlanger
My company is getting into smt and I am looking for advice on placement equipment. Our largest board is 7" x 13". The smallest parts are 0805, we only have soic so far and our volume is low to mid scale. Who makes a accurate, reliable, versitile, sma
Electronics Forum | Thu Feb 13 10:38:51 EST 2003 | davef
Given that you are bridging front to back, contast the situation with the thiefs used to prevent bridging when wave soldering SOIC. If this is reasonable, the thiefs should be located behind the trailing connector pins. You can prove-out this [and
Electronics Forum | Fri Sep 19 14:11:39 EDT 2003 | Bryan Sheh
Dear all, Is there anyone who has the experience in conducting Push&Pull test for fine pitch components?i.e.SOIC,QFP. The customer clearly stated that,"every lead should be tested for selected components".but, you know that,the fine pitch,0.5 or
Electronics Forum | Mon Mar 22 09:37:28 EST 2004 | ellis
After 2nd time reflow of double reflow, wrinkles solder joints found on SOIC and SOT components.(only happen on the components at the underside of pcb during reflow, top side components dont have this problem) is this due to the reflow process proble
Electronics Forum | Tue Oct 26 16:55:12 EDT 2004 | davef
More background please: * What is the condition of failure [eg, part damaged, part poorly attached, etc] * You mention heel and side fillets. What about under the component? * Are the components properly attached? Or are they floating on a bed of fl
Electronics Forum | Wed Oct 27 02:13:21 EDT 2004 | Joseph
Dear all, The problematic IC being X-rays and shown excellent wetting with no solder voids. Meanwhile the samples to be sent for independent party to verify the failure, e.g. using SAM method. The condition of failure is the PCB assembly fail functi
Electronics Forum | Thu Apr 21 15:40:05 EDT 2005 | Rob
How many times can I reflow SMT components such as SMT Ceramic Chip Caps (0603 and 0805), Res Caps, TSSOP's, SOIC's Tant Caps etc? Will I have a problem exposing them 4 to 6 times of reflow? Will I damage them? What will go wrong with that process?
Electronics Forum | Tue Jul 19 14:29:12 EDT 2005 | ppwlee
What are possible failure analysis (destructive or non-destructive and what are the pro/cons) I could conduct on the component level (of an IC) to determine failure mode/root cause? We are measuring internal shorts between leads on a SOIC after sold
Electronics Forum | Tue Oct 03 16:40:28 EDT 2006 | slthomas
It's a consignment kit and we already have the parts. Otherwise I'd tell them to panelize the thing and we could build all 30 in one pass. I may be able find a 25 mil QFP on a stencil and hand print that one part if the apertures are long enough. D
