Electronics Forum: solder joint defect tryps (Page 11 of 31)

Lead-Free Wave Defects

Electronics Forum | Wed Feb 08 08:05:51 EST 2006 | amol_kane

thank you for the reply.....this reinforces the same info about SAC305 that i had reviewed in other papers. Since this is an inherent property of SAC305, i am assuming 1. Wave parameter (temp/time) tweaking will not mitigate this? 2. what is differ

RoHS Training Material Recommendations?

Electronics Forum | Mon May 15 11:48:28 EDT 2006 | paulinct

Have any of you used/evaluated any Rohs training videos or manuals? This summer I will be coming up with a training program to go with our Rohs implementation. I mostly need it to show the difference in joint appearance, defect cause and effect, and

BGA Detached off the board

Electronics Forum | Mon Aug 11 07:27:32 EDT 2008 | eyalg

We had experienced two (2) A BGA which fail (detached) off the board. Surprisingly we noticed that most of solder joints remains on the board leaving perfectly exposed and clean pads on the on BGA package (virgin pads) . Note: No mechanical stress wa

BGA Head-in-pillow Defects

Electronics Forum | Tue Aug 26 09:33:04 EDT 2008 | wavemasterlarry

If this board is waved soldered than you may want to look at the wave causing the BGA to reflow a 2nd time when it goes over the wave. The board bows down and the the joint liquidfies and then hardens before the board fully goes back to flat which c

Problems to use lead free paste in PCB with Pb

Electronics Forum | Fri Jan 30 18:24:09 EST 2009 | gsala

Buenas dias Jos�, It shoul not be a problem. We had situation like that when in the early 2006 the Lead Free fase in Pb fase out, no pbm on solder joints. Today, after about 3 years, those cards are stil working in the field without any defect. Reg

X-Ray Gage Study Question

Electronics Forum | Thu Oct 08 13:26:46 EDT 2020 | SMTA-64387994

In particular we are looking to measure the repeatability of the voiding measurements for thermal pads on QFNs. There is some concern that given the nature of AXI programming with upper and lower boundaries set by a programmer to detect a defective s

AOI price

Electronics Forum | Sun Mar 13 23:30:59 EST 2005 | VS

After reflow AOI makes sense because it has the highest coverage of the defects. Problems like tombstone, lifted pins, open solder joints, some shorts and insufficient solder you will not find before oven. I would also not agree with the statement th

BGA Placement Process

Electronics Forum | Fri Mar 26 03:25:02 EDT 2010 | grahamcooper22

HI, regarding the baking....why are you doing it every 72 hours ? How many times has each device been baked ? If you are worried about moisture in the devices the best policy is to store them correctly in dry packs or dry cabinets or bake them once j

AOI Joint Inspection

Electronics Forum | Fri Oct 17 14:26:39 EDT 2008 | hegemon

We use Mirtec MV-7s for post SMT inspection of solder joints as well. The artistry is in the program debug. We are very pleased with the solder inspections provided by these machines, and technology having advanced bit, most every AOI machine has t

PCBA Time Estimation Formula

Electronics Forum | Fri Mar 22 12:29:25 EDT 2019 | unisoft

Unisoft ( http://www.unisoft-cim.com / 203-913-0782 ) has software that should help. Here are some links: *** Assembly Cost by Component Span Report for Quoting *** Assembly Cost by Component Span Report for Quoting http://www.unisoft-c


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