Technical Library: 2h and developer (Page 2 of 6)

Conductive Anodic Filament: Mechanisms and Affecting Factors

Technical Library | 2021-07-27 14:49:16.0

Conductive anodic filament (CAF) formation, a failure mode in printed wiring boards (PWBs) that are exposed to high humidity and voltage gradients, has caused catastrophic field failures. CAF is an electrochemical migration failure mechanism in PWBs. In this article, we discuss CAF, the factors that enhance it, and the necessary conditions for its occurrence. Published studies are discussed, and the results of historical mean time to failure models are summarized. Potential reasons for CAF enhancement solutions are discussed, and possible directions in which to develop anti-CAF materials are proposed.

Hong Kong Polytechnic University [The]

Smart and Connected Bioelectronics for Seamless Health Monitoring and Persistent Human-Machine Interfaces

Technical Library | 2020-06-10 01:42:55.0

Recent advancement of flexible wearable electronics allows significant enhancement of portable, continuous health monitoring and persistent human-machine interfaces. Enabled by flexible electronic systems, smart and connected bioelectronics are accelerating the integration of innovative information science and engineering strategies, ultimately driving the rapid transformation of healthcare and medicine. Recent progress in the development and engineering of soft materials has provided various opportunities to design different types of mechanically deformable systems towards smart and connected bioelectronics.

Georgia Institute of Technology

Focus on temperature and customized sensors

Technical Library | 2016-10-24 14:59:03.0

Temperature measurement is one of the most important physical parameters when determining quality, accuracy and reliability of processes not only in industrial use, but also in almost all human activities. Temperature sensors are produced with different technologies to fit specific application requirements. IST AG has concentrated one part of the development and manufacturing on high-end thin-film temperature sensors. This know-how is partially derived from the semiconductor industry and allows us to manufacture sensors with high accuracy, excellent long-term stability, high reliability and repeatability within a wide temperature range from -200 °C up to 1000 °C. Because of very small dimensions and low thermal mass, the thin-film temperature sensors exhibit a very short response time.

Innovative Sensor Technology, USA Division

Assembly and Rework of Lead Free Package on Package Technology

Technical Library | 2024-01-15 20:45:42.0

Miniaturization continues to be a driving force in both integrated circuit packaging and printed circuit board laminate technology. In addition to decreasing component pitch (lead to lead spacing), utilization of the vertical space by stacking packages has found wide acceptance by both designers and manufactures of electronics alike. Lead free Package on Package (PoP) technology represents one of the latest advancements in vertical electronics packaging integration and has become the preferred technology for mobile hand held electronics applications. TT Electronics in Perry, Ohio has developed the capability to assemble and rework numerous "state of the art" packaging technologies. This paper will focus on the essential engineering development activities performed to demonstrate TT Electronics' ability to both assemble and rework PoP components.

TT Electronics

Assembly and Rework of Lead Free Package on Package Technology

Technical Library | 2024-01-16 22:29:59.0

Miniaturization continues to be a driving force in both integrated circuit packaging and printed circuit board laminate technology. In addition to decreasing component pitch (lead to lead spacing), utilization of the vertical space by stacking packages has found wide acceptance by both designers and manufactures of electronics alike. Lead free Package on Package (PoP) technology represents one of the latest advancements in vertical electronics packaging integration and has become the preferred technology for mobile hand held electronics applications. TT Electronics in Perry, Ohio has developed the capability to assemble and rework numerous "state of the art" packaging technologies. This paper will focus on the essential engineering development activities performed to demonstrate TT Electronics' ability to both assemble and rework PoP components.

TT Electronics

Vapor Phase Technology and its Application

Technical Library | 2013-03-27 23:43:40.0

Vapor phase, once cast to the annals’ of history is making a comeback. Why? Reflow technology is well developed and has served the industry for many years, it is simple and it is consistent. All points are true – when dealing with the centre section of the bell curve. Today’s PCB manufacturers are faced with many designs which no longer fall into that polite category but rather test the process engineering groups with heavier and larger panels, large ground planes located in tricky places, component mass densities which are poorly distributed, ever changing Pb Free alloys and higher process temperatures. All the time the costs for the panels increase, availability of “process trial” boards diminishes and yields are expected to be extremely high with zero scrap rates. The final process in the assembly line has the capacity to secure all the value of the assembly or destroy it. If a panel is poorly soldered due to poor Oven setup or incorrect programming of the profile the recovery of the panel is at best expensive, at worst a loss. For these challenges people are turning to Vapor Phase.

A-Tek Systems Group LLC

Investigation and Development of Tin-Lead and Lead-Free Solder Pastes to Reduce the Head-In-Pillow Component Soldering Defect.

Technical Library | 2014-03-06 19:04:07.0

Over the last few years, there has been an increase in the rate of Head-in-Pillow component soldering defects which interrupts the merger of the BGA/CSP component solder spheres with the molten solder paste during reflow. The issue has occurred across a broad segment of industries including consumer, telecom and military. There are many reasons for this issue such as warpage issues of the component or board, ball co-planarity issues for BGA/CSP components and non-wetting of the component based on contamination or excessive oxidation of the component coating. The issue has been found to occur not only on lead-free soldered assemblies where the increased soldering temperatures may give rise to increase component/board warpage but also on tin-lead soldered assemblies.

Christopher Associates Inc.

Thermal Reliability of Laser Ablated Microvias and Standard Through-Hole Technologies as a Function of Materials and Processing

Technical Library | 2021-12-21 23:15:44.0

High Density Interconnect (HDI) technologies are being used widely in Asia and Europe in consumer electronics for portable wireless communication and computing, digital imaging, and chip packaging. Although North America lags behind in developing process capability for this technology, HDI will become a significant business segment for North America. For this to happen, the printed circuit board shops will have to become process capable in fabricating fine lines and spaces, and also be capable in forming and plating microvias.

Isola Group

Durable Conductive Inks and SMD Attachment for Robust Printed Electronics

Technical Library | 2018-10-24 18:04:12.0

Polymer Thick Film (PTF)-based printed electronics (aka Printed Electronics) has improved in durability over the last few decades and is now a proven alternative to copper circuitry in many applications once thought beyond the capability of PTF circuitry. This paper describes peak performance and areas for future improvement.State-of-the-art PTF circuitry performance includes the ability to withstand sharp crease tests, 85C/85%RH damp heat 5VDC bias aging (silver migration), auto seat durability cycling, SMT mandrel flexing, and others. The IPC/SGIA subcommittee for Standards Tests development has adopted several ASTM test methods for PTF circuitry and is actively developing needed improvements or additions. These standards are described herein. Advantages of PTF circuitry over copper include: varied conductive material compositions, lower cost and lower environmental impact. Necessary improvements include: robust integration of chip and power, higher conductivity, and fine line multi-layer patterning.

Engineered Materials Systems, Inc.

Parasitic Extraction for Deep Submicron and Ultra-deep Submicron Designs

Technical Library | 1999-08-09 11:36:27.0

Shrinking process technologies and increasing design sizes continually challenge design methodologies and EDA tools to develop at an ever-increasing rate. Before the complexities of deep submicron (DSM), gate and transistor delays dominated interconnect delays, and enabled simplified design methodologies that could focus on device analysis. The advent of DSM processes is changing all of this, invalidating assumptions and approximations that existing design methodologies are based upon, and forcing design teams to re-tool. High-capacity parasitic extraction tools are now critical for successful design tape-outs.

Cadence Design Systems, Inc.


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