Electronics Forum | Mon Jan 31 11:28:51 EST 2011 | krisroberson
You stated that you are producing Class 3 boards so I assume you are familiar with the IPC standards.To answer your question directly, I'll refer you back to the J-STD-001. Clause 12.1 states "12.1 Rework Hardware defects shall [N1N2D3] be documented
Electronics Forum | Thu Oct 26 16:38:08 EDT 2000 | Philip A. Reyes
Hi Sir Charles! Good Day! I hope you can help me about my queries. 1. What is the acceptable misregistration or misalignment of balls after reflow soldering of PBGA module on the PCB? 2. Is there any criteria for solder ball defect or solder beads
Electronics Forum | Tue Dec 14 12:00:34 EST 1999 | Kris Wiederhold
We recently reduced our standard aperture reduction to aid in the reduction of solder on gold defects. Since this reduction in aperture size, we have been experiencing exposed copper at the end of the component pads. The heel and toe joints are per
Electronics Forum | Tue Jul 27 16:30:35 EDT 1999 | Earl Moon
| Can anyone give me the virtues of SMT package castellations vs. no castellations with particular reference to the ruggedness and reliability of the solder joints? Any references or studies that you can point me to? Also, although I'm in favor of
Electronics Forum | Thu Oct 08 22:06:44 EDT 1998 | Eric R
| | | Does sombbody know what DPM rate a good and reliable SMT assembly line (incl. solder paste print, assembly and feflow soldering) has? | | | DPM is Defects per million, usually measured on components. We run a process consisting of small to medi
Electronics Forum | Thu Nov 30 13:51:33 EST 2000 | Michael Parker
Thanks for the details. Next question- where is your first time pass rate measured? Is this at test? Do you have inspection gates at the end of each process step? To get to the root cause, you need the earliest detection. Collect attribute data by a
Electronics Forum | Fri Jun 04 11:31:27 EDT 1999 | Tony
| I'm encountering a new problem at my new company that I haven't encountered before in my past life - and that's Wave Soldering VIA holes. | | We've been getting a rash of defects that we call in this company, "insufficient solder in VIA hole." The
Electronics Forum | Thu Jun 03 20:09:56 EDT 1999 | C.K.
I'm encountering a new problem at my new company that I haven't encountered before in my past life - and that's Wave Soldering VIA holes. We've been getting a rash of defects that we call in this company, "insufficient solder in VIA hole." These def
Electronics Forum | Fri Jun 04 11:30:40 EDT 1999 | Earl Moon
| I'm encountering a new problem at my new company that I haven't encountered before in my past life - and that's Wave Soldering VIA holes. | | We've been getting a rash of defects that we call in this company, "insufficient solder in VIA hole." The
Electronics Forum | Mon Jun 25 06:07:56 EDT 2001 | mzaboogie
Hello, I have a board that has been giving us problems for some time now. It is fairly well populated, mostly with IC's and SOT's on the topside. There is a Zilinx QFP160. This component does not reflow well. All of the other components look OK. A t
