Electronics Forum: yield (Page 13 of 55)

RMA vs No clean

Electronics Forum | Thu Jan 16 05:42:18 EST 2003 | nifhail

I've a query. I have one new Customer whom insisted us to use RMA paste on their product. The problem is, on some of their products they use via hole as the test point in where all the PCB finished are ENTEK and as usual I have to print solder paste

A.O.I - no salesman pitch pls

Electronics Forum | Wed Jun 11 09:58:35 EDT 2003 | swagner

Solder fillet inspection is something that I would avoid like SARS, solder joints are like a snowflake no two are the same, henceforth unrepeatability. The only time I would look into this would be for uBGA or flipchip on an audit basis utilizing X-

Outgoing QC Measurements for Board Operations

Electronics Forum | Tue Oct 21 10:24:54 EDT 2003 | russ

Whoever established the PPM rates should tell you what it is covering (solder joints/assemblies) PPM is nothing more than a ratio. Determining quality levels is really up to you/company and how you want to measure your quality. This can be anything

World Class First Time Yield

Electronics Forum | Sat Dec 27 01:32:42 EST 2003 | Ian Chan

IMHO, depending on whether its a regular run model, or a properly designed/setup pilot run model, getting a mean 75%-95% First Pass Yield (FPY%) is possible as a benchmark target. This is derived from your manufacturing history capabilities, and requ

SMT on rig-flex and multi-flex boards

Electronics Forum | Fri Oct 22 11:53:53 EDT 2004 | C Lampron

Hi Christina, What would you be basing the yields off of? Is it solder defect, component placement, etc....? I have worked for a flex house for quite a few years. You are right. The Polyimide is very dimentionally unstable. (even more so on humid da

DPMO as a metic to qualify a CEM as World Class

Electronics Forum | Wed Jan 17 17:17:21 EST 2007 | russ

i would say that you are there already. with 10,000 DPM0 you have a 1% fallout, you are at 99.9 basically. 1 out of a 1000 boards will fail? of course one thing we need to know is how many opportunitites do you count for a chip resistor for exam

DPMO as a metic to qualify a CEM as World Class

Electronics Forum | Wed Jan 17 18:08:51 EST 2007 | John S.

We use a fairly simple system. IPC put out standards 7912A and 9261A to define opportunities. Basicly the "number of components" + "number of solder joints" = "number of opportunities." Some six sigma benchmarking studies indicated "Sigma Level" =

Selective Soldering Equipment

Electronics Forum | Wed Dec 05 22:59:42 EST 2007 | er_pe

To be successful, and to yield quality products off any selective solder systems out there on the market today, DFX rules need to be enforced and followed. Lay-out is a one-shot process where as manufacturing of the PCBA is continuous. Obviously, muc

Re: SMT Yields

Electronics Forum | Sat Feb 19 04:16:46 EST 2000 | Michael H

Hi What would be considered a reasonable benchmark when placing finepitch devices say 24, 15mill pitch devices avg 2000 joints and a total pad count of 6918. I would be gratefull for any advice on this matter, also if anyone can recommend any real

Re: SMT Yields- Dean please explain-thanks.

Electronics Forum | Mon Feb 21 12:02:58 EST 2000 | K. Ckak

Hi Dean, Can you please tell me how we could incorporate DPU to DPMO? Also, can you please explain the deviation factor DPU * deviation factor = DPMO ? Should we take dollar value or number of joints? Explain with calculations if you please. Thanks


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