Electronics Forum | Thu Jun 04 08:32:21 EDT 1998 | Dave F
| | Hello: | | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints
Electronics Forum | Tue Jul 15 16:12:23 EDT 2008 | boardhouse
Hi Armynski, I sell for an offshore board house, yes, it is common for offshore board shops to fill vias. The bubble is caused by air entrampment within the hole it self, when heat is applied during Hot air and the via is covered on both sides the e
Electronics Forum | Wed Jun 10 18:40:00 EDT 1998 | Earl Moon
| I am looking for the Industry standards on vias. Are they required to be plated with solder or is copper plating enough? What about reliabilty with either one? Also, if tenting the via is required should it be copper plated or solder plated over
Electronics Forum | Wed Jun 03 21:25:33 EDT 1998 | John Allan
| Hello: | BACKGROUD: SMT components soldered on the top-side of boards that also require wave soldering have the potential to reflow during wave soldering. Reflowing these components during wave soldering is not good. It can cause cold joints, op
Electronics Forum | Mon Mar 15 09:55:53 EST 1999 | Justin Medernach
| After rmoving a BGA (plastic)to correct unexplained shorts | I installed another BGA using flux only. | Checking on an X Ray machine and found two shorts. | | can anyone give a good explenation ? | | Thanks | | Ron | Ron, It could be a number o
Electronics Forum | Thu Nov 25 21:43:49 EST 1999 | cklau
Via is normally a plated thru holes in (0.63 to 1.0 mm (0.025" to 0.040") diameter lands , which unless properly treated they must be located away from the component lands to prevent the solder migration off the component land during reflow soldering
Electronics Forum | Tue Dec 14 01:05:09 EST 1999 | cklau
Hi All I have a 0.7 mm diameter hole for vias, what�s the minimum annular ring for this hole diameter? Ans: Fur inner layers Min = .006" hole-pad annular ring ; inner pad dia - hole dia/2 For outer layers Min = .005" hole-pad annular ring ; outer p
Electronics Forum | Mon Feb 19 22:56:20 EST 2007 | davef
Russ We agree with your comments on plugging from one side only. But... We believe that it IS possible to trap process chemicals [technically, not flux] in a blind [or any other] via. This can be done by plating the via closed, rather than pluggi
Electronics Forum | Mon Sep 20 13:04:25 EDT 2004 | davef
The Intel BGA Developer�s Guide [ http://developer.intel.com/design/packtech/ch_14.pdf ] says: 14.8.3.3 Plated Through Hole (PTH) Isolation Regardless of the technique used for the mounting pads shape or definition, isolation of the plated through h
Electronics Forum | Sat May 18 15:19:55 EDT 2013 | isd_jwendell
OK, I've now read all of the documents you referenced. The problem still remains regarding the thermal vias and how to minimize scavenging. All the docs acknowledge top and bottom tenting, and it's problems. TI says don't do it. Plugging is usually n
