Electronics Forum | Wed Jul 17 10:59:26 EDT 2002 | fraser
Piece of cake, our sencil design software not only automaticaly mods the data for all component pitches but can apply anti solder ball designs ( homebase, form4 vnotch etc). As an added bonus it warns when the side wall to surface area ratio exceeds
Electronics Forum | Tue Jun 11 17:12:29 EDT 2002 | mdmilward
Hello, Can I please get some help on finding formulas for calculation of surface mount pad sizes for stencil design and solder paste deposition. I've recently joined a company who has allowed their stencil supplier to develop the stencils based upon
Electronics Forum | Thu Dec 05 17:40:24 EST 2002 | davef
While unfamiliar with some of the terms you use, could this be what you seek? http://www.pcbstandards.com/downloads/Metric%20Environment/General%20Documentation/PCB%20Design/PCB%20Design%20Routing/Metric%20BGA%20Routing.pdf Stepping backwards just
Electronics Forum | Thu Apr 12 10:01:43 EDT 2007 | realchunks
Hi aj, Pete is right, there are several variables that can affect your quality when it comes to stencil design. A good idea is to have a stencil made with various designs incorporated into it. A lot of engineers like the reverse homeplate design.
Electronics Forum | Wed Jul 25 11:16:34 EDT 2007 | lloyd
Hi Folks, I hope someone can help me, Is the homeplate stencil design (for reduced solder paste) the same for preventing solder balls as it is for reducing tombstones? i.e. the reduction of solder paste under the component termination. I'm trying to
Electronics Forum | Wed Nov 21 15:02:46 EST 2007 | jlawson
From info I have been told from design standpoint, via in pads helps with managing EMC issues with working design, in particular for high speed digital/dense populated type PCB's. We had a manufacturing customer that had very low yield because of th
