Electronics Forum | Tue Apr 10 13:12:41 EDT 2001 | davef
You've told us nothing about your situation, process, boards, or anything!!! If you leave some boards with very fine solder connections on the shelf for a cuppla years, the grain will become coarse. What do you mean when you say "grainy"? What is
Electronics Forum | Mon Apr 30 10:22:49 EDT 2001 | kaopsahl
Greetings. I have noticed quite a few postings lately to the effect of "hi, I want to be a SMT pro and make circuit boards, help me". Try to understand why folks on the forum are cringing at your proposal. All of the feedback I have seen regarding yo
Electronics Forum | Wed May 09 03:29:16 EDT 2001 | Eyal Duzy
Yes, your observation is accurate. Different process steps have different inspection requirements which necessitates employing different imaging technology to ensure the best performance (detection and throughput). Orbotech, for example, offers both
Electronics Forum | Mon Jun 11 21:56:41 EDT 2001 | davef
Continuing, I�ve optioned about the uselessness of shear testing of solder connections on this forum previously. So, the points that you make about the elusiveness of developing a standard for measuring solder connection strength is well taken. I�l
Electronics Forum | Mon Dec 20 11:58:34 EST 1999 | Chris May
Mike, I can only reiterate what Wolfgang has covered. How have you manufactured these previously ? Were they small hand built batches and now you are ramping up production ? Does the $150K include materials or is it free issue ? If a manufacturer
Electronics Forum | Wed Oct 06 12:03:12 EDT 1999 | Graham Naisbitt
| | Hi, | | | | Help! Could anyone help to enlighten me on this? | | | | Question: | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z that using a n
Electronics Forum | Wed Oct 06 23:36:28 EDT 1999 | karlin
| | | Hi, | | | | | | Help! Could anyone help to enlighten me on this? | | | | | | Question: | | | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowable Y/Z or X/Z
Electronics Forum | Fri Oct 08 02:31:07 EDT 1999 | Brian
| | | | Hi, | | | | | | | | Help! Could anyone help to enlighten me on this? | | | | | | | | Question: | | | | | | | | If I have a CSP/BGA package of size X by Y and the standoff gap between the component and PCB is Z, What is the maximum allowab
Electronics Forum | Tue Sep 28 10:29:28 EDT 1999 | Wolfgang Busko
| Dear all, | | We've got a curious problem. We have had a major problem with BGA's occasionally being placed one to several rows or columns off the pads. We are using Universal's GSM2 platform for our general purpose placements. Our Universal re
Electronics Forum | Tue Sep 28 08:27:55 EDT 1999 | Earl Moon
| if anyone has used or has one of these bga rework stations please give me your opinion on them. I am planning on using the sytem for not only rework but also low volume prototype production for hand built 1 or 2 qty pcb's, so ease of use is impor
