Electronics Forum: soldered (Page 1955 of 2099)

AOI SYSTEMS: MVP, TRI or CYBEROPTICS ?

Electronics Forum | Tue Oct 28 20:26:53 EDT 2008 | fishingfool

Dominik, Pixel size should not be the main criteria for selecting an AOI. I have a customer that has 2 MVP and they say the solder test are good but part reconigtion is not so good. You also say you need some flexibility on software. I also have

General SMT Question

Electronics Forum | Thu Nov 20 17:52:30 EST 2008 | orian

Hello Im a uni student trying to find out information on SMT. Ive just spent around 2 hours searching for SMT information and can not find anything. More i spend time trying to figure out how, im starting to think, this is not something you can do

BGA failure at Functional Test

Electronics Forum | Mon Jan 12 02:29:13 EST 2009 | sachu_70

Hi Milan, One cause for such BGA failures could either be a laminate warp (bow or twist) formed during your Reflow or Wave soldering process, or perhaps a warp seen on the BGA component package itself prior to processing on SMT line. IPC guidelines f

Epoxy for holding large inductors

Electronics Forum | Fri Jan 16 16:36:37 EST 2009 | rwyman

We've used our standard chipbonder- Heraeus PD944- for this type of application. While it does cure before reflow, when the part is placed onto the site, the material compresses and spreads and thus that potential standoff isn't an issue. We've als

lead free joint finish

Electronics Forum | Wed Jan 28 21:47:56 EST 2009 | padawanlinuxero

Hello! I am having trouble with the new changes from lead joint to lead free joint, we are working on change to lead free, I am using a 3 zone oven reflow, the zone temps are : zone 1 zone 2 zone 3 (top and bottom) 128 208 260 th

Damaged Components by Reflow Process (Process Window)

Electronics Forum | Wed Feb 04 03:20:05 EST 2009 | smartasp

Hi All Reflow Gurus I have learnt that my process engineers do not consider the heat resistance, of the components when creating a reflow profile but rather try to stick to the paste recommendation. This has lead to a field recall as one component h

assembly cleanliness and ionic testing

Electronics Forum | Thu Feb 12 11:57:59 EST 2009 | jmiller

i have searched the forum for hours. read all the threads that deals with cleanliness and ionic testing. (http://www.smtnet.com/forums/Index.cfm?CFApp=1&Message_ID=40295) (http://www.smtnet.com/forums/Index.cfm?CFApp=1&Message_ID=22603) (http://www.

High complex board manufacturing

Electronics Forum | Tue Mar 03 03:02:17 EST 2009 | emmanueldavid

25% out of Lands in PCB, Insufficient/Inconsistent Alloy deposition which causes for poor Tackiness between Device Spheres & Paste deposited. Also note that Aperture Opening Designs in Your Stencil draws a huge role for these defects. 4. Placement: P

layer 2 groundplane disconnects after hand solder

Electronics Forum | Mon Apr 13 12:06:53 EDT 2009 | jefflkupkt

BoardHouse, Thanks for the reply. The board supplier did cover the cost of the bare boards. Five years ago I saw a different part pass ET only to fail at final assembly test as well. One engineer called it "acid trap" on the inner layers where the

Quad IVc power up

Electronics Forum | Mon Apr 13 14:36:18 EDT 2009 | leemeyer

I have seen this problem before. There is a cable that runs from the Quadalign board to the backside of the backplane. It is not secured in any way so it may have come loose in shipping. Open the right side panel on the machine. The Quadalign board


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