Electronics Forum: designed (Page 200 of 537)

Re: CCGA stencil design

Electronics Forum | Sat Mar 18 07:33:34 EST 2000 | Dave F

Jack: Two concerns with column devices: 1 Coplaniarity of the device and the board. 2 Adequate solder that you mentioned, becuase the columns will not be reflowing and you need to cloatthem with solder. You didn't describe your aperture, but even

Re: CCGA stencil design

Electronics Forum | Mon Mar 20 10:54:36 EST 2000 | Glenn Robertson

Jack - The last time I checked IBM was specifying a minimum of 4800 cubic mils of paste for each pad. This is required for acceptable reliability, not just to make the connection. There is no way you are getting that volume with a 5 mil stencil

Tools / Methods to remove solder balls

Electronics Forum | Thu Mar 16 09:01:28 EST 2000 | Ashok Dhawan

I am looking for suggestions on " How to remove solder Balls". We have some designs and tools where nothing can be done economically except to remove the solder balls manually. We are using "Probe" picks to do that job. Anyone who can suggest a bet

Min Hole/Pad distance to edge of PCB

Electronics Forum | Mon Mar 13 15:10:52 EST 2000 | Stuart Adams

Assuming agressive design rules what is the minimum distance I can get away with between the board edge and a SMT pad and between the board edge and a plated mounting hole ??? (The board is only 1"x2" and the mounting holes are 80 mil dia, 125 mil

Re: footprint formula

Electronics Forum | Fri Mar 03 06:41:09 EST 2000 | jacqueline coia

I have tried the IPC calculator and they do not have this type of component registered. When trying to select 'other' on menu, no connection can be made. The polarity if the QFP has not been decided yet (pre-PCB design) the pitch size of the componen

Re: 0603 Tombstoning

Electronics Forum | Thu Feb 24 11:11:25 EST 2000 | Russ

I have seen this before, our problem was palladium termination of this component. We could not change suppliers so we use a "reverse homeplate" stencil design to put the majority of paste directly underneath the solder terminations of the component

Insulation distance

Electronics Forum | Mon Jan 22 09:06:21 EST 2001 | jmlasserre

Product concerned: Sdram memory. Due to the net resistor size and shape (0603, the lead of this component is very close to some vial hole. What is the minimum clearance we must have between a component lead and a pad or via ? For the pcb design th

PQFP with pitch of 0.4 mm

Electronics Forum | Tue Jan 30 15:30:17 EST 2001 | dason_c

Please check what is the actual pitch size. I found some of the designer use 15.7 mil pitch and no accumulate ie 15.7, 15.7 and 15.8...... Also, I recommended the pad width should be 10 - 11 mil for 0.4mm pitch. You can open the 10 - 10.5 mil aper

PQFP with pitch of 0.4 mm

Electronics Forum | Tue Jan 30 21:14:26 EST 2001 | davef

Suggestions are: * Limit pad width to 0.008" [0.2mm] * Use IPC-7525 Stencil Design Guidelines * Avoid Type 4 pastes, if you can * Slow down your print head to 0.63"/sec [16 mm/sec] * Consider the suggestions on printing by rpereira in the past

Round Solder Lands

Electronics Forum | Mon Feb 26 07:19:47 EST 2001 | PeteC

Has anybody ever seen round solder lands for 0603 chip components? I've got a new board to build and it has round lands. I've asked the design enegineer why he chose round lands. Waitin for the answer. And the funny thing is all the 0603 chips don't


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