Technical Library | 2016-05-13 11:44:16.0
The process of manufacturing and qualifying IC's consists of many steps while Temperature forcing systems play a crucial role in the final testing process. These environmental tests assure quality and reliability by stressing the device on one hand as well as helping to characterize and validate it on the other hand (making sure manufacturing outcome meets the design requirements). At later stages the temperature testing can support failure analysis effort and root cause analysis. AS common practice we are dealing with few different kinds of temperature forcing systems: Chambers, Thermal Stream systems and Direct Thermal Head systems. In this article I would like to focus on the practical aspects of utilizing Thermal Stream systems and Direct Thermal Head systems.
Technical Library | 2017-01-19 16:58:47.0
The biggest problem with designing rigid-flex hybrid PCBs is making sure everything will fold in the right way, while maintaining good flex-circuit stability and lifespan. The next big problem to solve is the conveyance of the design to a fabricator who will clearly understand the design intent and therefore produce exactly what the designer/engineer intended.Rigid-Flex circuit boards require additional cutting and lamination stages, and more exotic materials in manufacturing and therefore the cost of re-spins and failures are very much higher than traditional rigid boards. To reduce the risk and costs associated with rigid-flex design and prototyping, it is desirable to model the flexible parts of the circuit in 3D CAD to ensure correct form and fit. In addition it is necessary to provide absolutely clear documentation for manufacturing to the fabrication and assembly houses.
Technical Library | 2017-06-13 17:14:59.0
For tin-rich solder alloys, 200 C (392 F) is an extreme temperature. Intermetallic growth in tin-copper systems is known to occur and is believed to bear a direct relationship to failure mechanisms. This study of morphological changes with time at elevated temperatures was made to determine growth rates of tin-copper intermetallics. Preferred growth directions, rates of thickening, and notable changes in morphology were observed.Each of four tin-base alloys was flowed on copper and exposed to temperatures between 100 C and 200 C for time periods of up to 32 days. Metallographic sections were taken and the intermetallics were examined. Intermetallic layer thickening is characterized by several distinct stages. The initial growth of side plates is extremely rapid and exaggerated. This is followed by retrogression (spheroidization) of the elongated peaks and by general thick-
Technical Library | 2023-11-20 18:18:34.0
When x-ray inspection is used as part of a quality assurance program for any assembled device, steps must be taken early in the design stage to anticipate the use of x-ray inspection later in the development and production processes. This is a lesson that electronic assembly manufacturers learned years ago, and that medical device manufacturers are also discovering. There are several steps involved in learning how to interpret x-ray images, and how to design for x-ray inspection. First, manufacturers need to understand the nature of the x-ray shadow and its modalities; then they need to see how medical device developers and manufacturers are using x-ray inspection; finally, they need to consider taking measures early in the design process to ensure a clear, accurate image when the assembled device undergoes x-ray inspection.
Technical Library | 2016-04-08 01:19:52.0
PCB assembly designs become more complex year-on-year, yet early-stage form/fit compliance verification of all designed-in components to the intended manufacturing processes remains a challenge. So long as librarians at the design and manufacturing levels continue to maintain their own local standards for component representation, there is no common representation in the design-to-manufacturing phase of the product lifecycle that can provide the basis for transfer of manufacturing process rules to the design level. A comprehensive methodology must be implemented for all component types, not just the minority which happen to conform to formal packaging standards, to successfully left-shift assembly and test DFM analysis to the design level and thus compress NPI cycle times.(...)This paper will demonstrate the technological components of the working solution: the logic for deriving repeatable and standardized package and pin classifications from a common source of component physical-model content, the method for associating DFA and DFT rules to those classifications, and the transfer of those rules to separate DFM and NPI analysis tools elsewhere in the design-through-manufacturing chain resulting in a consistent DFM process across multiple design and manufacturing organizations.
Technical Library | 2019-05-01 23:18:27.0
Moisture can accelerate various failure mechanisms in printed circuit board assemblies. Moisture can be initially present in the epoxy glass prepreg, absorbed during the wet processes in printed circuit board manufacturing, or diffuse into the printed circuit board during storage. Moisture can reside in the resin, resin/glass interfaces, and micro-cracks or voids due to defects. Higher reflow temperatures associated with lead-free processing increase the vapor pressure, which can lead to higher amounts of moisture uptake compared to eutectic tin-lead reflow processes. In addition to cohesive or adhesive failures within the printed circuit board that lead to cracking and delamination, moisture can also lead to the creation of low impedance paths due to metal migration, interfacial degradation resulting in conductive filament formation, and changes in dimensional stability. Studies have shown that moisture can also reduce the glass-transition temperature and increase the dielectric constant, leading to a reduction in circuit switching speeds and an increase in propagation delay times. This paper provides an overview of printed circuit board fabrication, followed by a brief discussion of moisture diffusion processes, governing models, and dependent variables. We then present guidelines for printed circuit board handling and storage during various stages of production and fabrication so as to mitigate moisture-induced failures.
Technical Library | 2021-06-02 19:34:48.0
In recent years, there has been dynamic changes in the industrial environment as a result of further innovations called Industry 4.0 (I.4.0), especially in the field of digital technology and manufacturing. Despite numerous examples of the implementation of Industry 4.0 in enterprises, there is no general framework for the implementation of Industry 4.0 with a detailed schedule. Researching the ways of implementing Industry 4.0 is still a current and unexplored area of research. The main aim of the paper is to present the concept of the theoretical framework for Industry 4.0 implementation based on selected schedules of the Industry 4.0 implementation. The paper was based on information from literature review and analysis of pilot enterprise projects to Industry 4.0 (case study) that were conducted in selected enterprises. The paper presents the key components of the framework of Industry 4.0 and the basic stage of implementing the concept in the enterprises, paying attention to their sequence and time frames. The proposed approach is dedicated to researchers and practitioners who implement the concept of Industry 4.0 in enterprises
Technical Library | 2021-09-15 19:00:35.0
This paper presents the use of physics of failure (PoF) methodology to infer fast and accurate lifetime predictions for power electronics at the printed circuit board (PCB) level in early design stages. It is shown that the ability to accurately model silicon–metal layers, semiconductor packaging, printed circuit boards (PCBs), and assemblies allows, for instance, the prediction of solder fatigue failure due to thermal, mechanical, and manufacturing conditions. The technique allows a lifecycle prognosis of the PCB, taking into account the environmental stresses it will encounter during the period of operation. Primarily, it involves converting an electronic computer aided design (eCAD) circuit layout into computational fluid dynamic (CFD) and finite element analysis (FEA) models with accurate geometries. From this, stressors, such as thermal cycling, mechanical shock, natural frequency, and harmonic and random vibrations, are applied to understand PCB degradation, and semiconductor and capacitor wear, and accordingly provide a method for high-fidelity power PCB modelling, which can be subsequently used to facilitate virtual testing and digital twinning for aircraft systems and sub-systems.
Technical Library | 2020-09-02 22:14:36.0
The demand for miniaturization and higher density electronic products has continued steadily for years, and this trend is expected to continue, according to various semiconductor technology and applications roadmaps. The printed circuit board (PCB) must support this trend as the central interconnection of the system. There are several options for fine line circuitry. A typical fine line circuit PCB product using copper foil technology, such as the modified semi-additive process (mSAP), uses a thin base copper layer made by pre-etching. The ultrathin copper foil process (SAP with ultrathin copper foil) is facing a technology limit for the miniaturization due to copper roughness and thickness control. The SAP process using sputtered copper is a solution, but the sputtering process is expensive and has issues with via plating. SAP using electroless copper deposition is another solution, but the process involved is challenged to achieve adequate adhesion and insulation between fine-pitch circuitries. A novel catalyst system--liquid metal ink (LMI)--has been developed that avoids these concerns and promotes a very controlled copper thickness over the substrate, targeting next generation high density interconnect (HDI) to wafer-level packaging substrates and enabling 5-micron level feature sizes. This novel catalyst has a unique feature, high density, and atomic-level deposition. Whereas conventional tin-palladium catalyst systems provide sporadic coverage over the substrate surface, the deposited catalyst covers the entire substrate surface. As a result, the catalyst enables improved uniformity of the copper deposition starting from the initial stage while providing higher adhesion and higher insulation resistance compared to the traditional catalysts used in SAP processes. This article discusses this new catalyst process, which both proposes a typical SAP process using the new catalyst and demonstrates the reliability improvements through a comparison between a new SAP PCB process and a conventional SAP PCB process.
Technical Library | 2021-06-07 19:06:32.0
The technological growth of the last decades has brought many improvements in daily life, but also concerns on how to deal with electronic waste. Electrical and electronic equipment waste is the fastest-growing rate in the industrialized world. One of the elements of electronic equipment is the printed circuit board (PCB) and almost every electronic equipment has a PCB inside it. While waste PCB (WPCB) recycling may result in the recovery of potentially precious materials and the reuse of some components, it is a challenging task because its composition diversity requires a cautious pre-processing stage to achieve optimal recycling outcomes. Our research focused on proposing a method to evaluate the economic feasibility of recycling integrated circuits (ICs) from WPCB. The proposed method can help decide whether to dismantle a separate WPCB before the physical or mechanical recycling process and consists of estimating the IC area from a WPCB, calculating the IC's weight using surface density, and estimating how much metal can be recovered by recycling those ICs. To estimate the IC area in a WPCB, we used a state-of-the-art object detection deep learning model (YOLO) and the PCB DSLR image dataset to detect the WPCB's ICs. Regarding IC detection, the best result was obtained with the partitioned analysis of each image through a sliding window, thus creating new images of smaller dimensions, reaching 86.77% mAP. As a final result, we estimate that the Deep PCB Dataset has a total of 1079.18 g of ICs, from which it would be possible to recover at least 909.94 g of metals and silicon elements from all WPCBs' ICs. Since there is a high variability in the compositions of WPCBs, it is possible to calculate the gross income for each WPCB and use it as a decision criterion for the type of pre-processing.
