Electronics Forum | Tue Jan 25 13:15:17 EST 2000 | Michael Allen
Thanks for the input Mike (and others). As you guessed, via-in-pad is not my idea, and I'm resisting it as much as I can. One of our designers used this practice at some other company, says there were no problems, and wants to use it (via-in-pad) a
Electronics Forum | Thu Mar 29 08:46:23 EDT 2007 | realchunks
Well I DO KNOW! Hi aj, 100% on the lead pads and 50% reduction on the center pad if you do not use thermal vias. If you do use thermal vias, you may need to increase the amount of paste needed, but not by much. 50% will be a good start. After re
Electronics Forum | Thu Jul 08 15:38:27 EDT 1999 | Earl Moon
| Thank you all for your replies. Thanks to your replies and backup from the IPC-SM-782A (section 3.6.3.2) and James Blankenhorn's "SMT Design Rules & Standards," the designer has agreed to provide adequate clearance between the via and the pad. |
Electronics Forum | Tue Sep 22 09:07:02 EDT 1998 | Steve Gregory
Hi Jacqueline! Do these joints that you're having problems with happen to be on fine pitch solder joints? Are the fillets staying attached to the foot and separating from the pads cleanly? If that is true, are there many vias concentrated aroun
Electronics Forum | Thu Jun 25 12:45:37 EDT 1998 | Steve Gregory
Hi there Chris! Are the leads you talking about fine pitch? Is the complete fillet attached to the foot, with it being cleanly separated from the pad? I bet if you look at the board there will be via's really close to the pads at the locations wh
Electronics Forum | Tue Dec 17 11:01:24 EST 2002 | Tim Marc
Hello all, One of our PCB manufacturers coated a through hole connecters vias with solder mask. The only IPC references that comes close to describing this problem is 2.9.2 Registration to holes, and subsequent specification 6.3.1 PTH � Vertical fil
Electronics Forum | Fri Jun 04 11:31:27 EDT 1999 | Tony
| I'm encountering a new problem at my new company that I haven't encountered before in my past life - and that's Wave Soldering VIA holes. | | We've been getting a rash of defects that we call in this company, "insufficient solder in VIA hole." The
Electronics Forum | Mon Dec 13 00:48:33 EST 1999 | armin
Hi All I have a 0.7 mm diameter hole for vias, what�s the minimum annular ring for this hole diameter? What�s the term unsupported and supported holes refer to in IPC-2221 9.1.2 Annular Ring Requirements? I have a proto-type PCB (designed by our R&
Electronics Forum | Wed Feb 05 13:08:20 EST 2003 | joeherz
You're correct that a thicker solder deposit will make bridging on fine pitch devices a bigger risk. Another alternative could be to slightly over-print the pads (onto the soldermask) ala pin-in-paste process. Basically adding enough solder to fill
Electronics Forum | Mon Feb 19 10:04:21 EST 2007 | realchunks
It's a nasty little part, but usuallu solders well. Now your inspectors will thing it's not soldered and try and touch it up, but generally, the exposed leads are not tinned, and will not toe fillet. If they know this up front they won't over heat
