Technical Library | 2017-08-12 16:01:49.0
The Case of Night Shifts vs. Additional Production Lines for PCB Assembly Efficiency
Technical Library | 2017-12-11 22:31:06.0
Typical printed circuit board assemblies (PCBAs) processed by reflow, wave, or selective wave soldering were analysed for typical levels of process related residues, resulting from a specific or combination of soldering process. Typical solder flux residue distribution pattern, composition, and concentration are profiled and reported. Presence of localized flux residues were visualized using a commercial Residue RAT gel test and chemical structure was identified by FT-IR, while the concentration was measured using ion chromatography, and the electrical properties of the extracts were determined by measuring the leak current using a twin platinum electrode setup. Localized extraction of residue was carried out using a commercial C3 extraction system. Results clearly show that the amount and distribution of flux residues are a function of the soldering process, and the level can be reduced by an appropriate cleaning. Selective soldering process generates significantly higher levels of residues compared to the wave and reflow process. For conformal coated PCBAs, the contamination levels generated from the tested wave and selective soldering process are found to be enough to generate blisters under exposure to high humidity levels.
Technical Library | 2018-06-13 11:42:00.0
The art of screen printing solder paste for the surface mount community has been discussed and presented for several decades. However, the impending introduction of passive Metric 0201 devices has reopened the need to re-evaluate the printing process and the influence of stencil architecture. The impact of introducing apertures with architectural dimensions’ sub 150um whilst accommodating the requirements of the standard suite of surface mount connectors, passives and integrated circuits will require a greater knowledge of the solder paste printing process.The dilemma of including the next generation of surface mount devices into this new heterogeneous environment will create area ratio challenges that fall below todays 0.5 threshold. Within this paper the issues of printing challenging area ratio and their associated aspect ratio will be investigated. The findings will be considered against the next generation of surface mount devices.
Technical Library | 2010-06-23 21:59:03.0
Quality control is one of the main bottlenecks in the production of micro-opto-electromechanical systems/microelectromechanical systems (MOEMS/MEMS) because each structure on a wafer is serially inspected and scanned stepwise over the entire wafer area.
Technical Library | 2017-07-24 16:21:27.0
When designing innovative products, material concerns often take a backseat to user experience goals. This is natural – after all, good products that offer value to end-users are essentially guaranteed a place on the modern tech marketplace. However, material management concerns take priority when considering the cost and turnaround time of product manufacture.
Technical Library | 2017-08-02 16:24:31.0
When designing innovative products, material concerns often take a backseat to user experience goals. This is natural – after all, good products that offer value to end-users are essentially guaranteed a place on the modern tech marketplace. However, material management concerns take priority when considering the cost and turnaround time of product manufacture.
Technical Library | 2007-10-10 23:23:40.0
Process engineers, who are seeking to achieve the most effective and reproducible thermal transfer process, look to today's forced convection ovens for applications such as flipchip, BGA, and lead-free soldering. A forced convection process to maximize thermal uniformity can be best accomplished by employing static pressure generation in what's known as "closed loop convection".
Technical Library | 2008-05-28 18:41:53.0
This paper describes correlation between a true 2D area measurement (e.g. printer) and a height map generated area from a SPI system. In addition, this paper will explore the correlation between area/volume measurements and bridge detection between 2D/3D techniques. The ultimate goal is to arm the process engineers with information that can be used to make decision that will impact defects, cost, throughput and Return On Investment.
Technical Library | 2009-03-13 00:27:09.0
Open product reliability testing in Stockholm, Sweden in January as part of a live production event generated some quite startling results. It was apparent that many components simply cannot handle the high reflow temperatures of a lead-free soldering process, and that many surface-mount machine suppliers are battling significant problems with QFN packages and other components that are mounting edgeways (bill boarding). However, some suppliers have achieved good results.
Technical Library | 2011-09-15 18:43:15.0
The revolution in performance driven electronic systems continues to challenge the IC packaging industry. To enable the new generations of processors to reach their performance potential many manufacturers have developed interface formats to enable greater memory bandwidth. To ensure that the memory functions are able to support the increased signal speed, package developers are relying more and more on innovative 3D package assembly techniques and process refinement.
