Industry News | 2016-08-22 19:16:24.0
Vi TECHNOLOGY will exhibit with AXIS AUTOMATION in Hall 3 – Booth 3141 at ELECTRONICA India, scheduled to take place September 21-23, 2016 at the BIEC- Bangalore International Exhibition Center. Vi TECHNOLOGY will showcase its award-winning PI series 3D SPI. The PI Series has been recognized by the industry as the most innovative SPI product since the introduction of Moiré systems.
Industry News | 2020-06-24 15:22:46.0
The Assembly Solutions division of MacDermid Alpha Electronics Solutions will be introducing its ultra-low temperature solder and 5G solutions at the Productronica China show from July 3-5, 2020, at the National Exhibition and Convention Center in Shanghai.
Industry News | 2019-08-15 07:31:59.0
AXI is short for automated X-ray inspection, it's one of the most commonly used approaches for defect inspection in PCB Assembly.
Industry News | 2018-10-09 14:46:48.0
Kester will be exhibiting (booth #117) at SMTAI 2018, which will take place October 16-17 at the Donald Stephens Convention Center in Rosemont, IL.
Industry News | 2003-02-07 08:51:46.0
An Earnings Conference Call is Scheduled for Thursday, February 6, 2003, at 9:00 a.m. EST.
Industry News | 2003-04-01 08:48:49.0
Setting a New Standard in AOI PCB Inspection
Technical Library | 2019-02-13 13:45:11.0
Development of information and telecommunications network is outstanding in recent years, and it is required for the related equipment such as communication base stations, servers and routers, to process huge amount of data in no time. As an electrical signal becomes faster and faster, how to prevent signal delay by transmission loss is a big issue for Printed Circuit Boards (PCB) loaded on such equipments. There are two main factors as the cause of transmission loss; dielectric loss and conductor loss. To decrease the dielectric loss, materials having low dielectric constant and low loss tangent have been developed. On the other hand, reducing the surface roughness of the copper foil itself to be used or minimizing the surface roughness by modifying surface treatment process of the conductor patterns before lamination is considered to be effective in order to decrease the conductor loss. However, there is a possibility that reduction in the surface roughness of the conductor patterns will lead to the decrease in adhesion of conductor patterns to dielectric resin and result in the deterioration of reliability of PCB itself. In this paper, we will show the evaluation results of adhesion performance and electrical properties using certain type of dielectric material for high frequency PCB, several types of copper foil and several surface treatment processes of the conductor patterns. Moreover, we will indicate a technique from the aspect of surface treatment process in order to ensure reliability and, at the same time, to prevent signal delay at the signal frequency over 20 GHz.
Technical Library | 2016-03-24 17:37:09.0
Today's Electronic Industry is changing at a high pace. The root causes are manifold. So world population is growing up to eight billions and gives new challenges in terms of urbanization, mobility and connectivity. Consequently, there will raise up a lot of new business models for the electronic industry. Connectivity will take a large influence on our lives. Concepts like Industry 4.0, internet of things, M2M communication, smart homes or communication in or to cars are growing up. All these applications are based on the same demanding requirement – a high amount of data and increased data transfer rate. These arguments bring up large challenges to the Printed Circuit Board (PCB) design and manufacturing.This paper investigates the impact of different PCB manufacturing technologies and their relation to their high frequency behavior. In the course of the paper a brief overview of PCB manufacturing capabilities is be presented. Moreover, signal losses in terms of frequency, design, manufacturing processes, and substrate materials are investigated. The aim of this paper is, to develop a concept to use materials in combination with optimized PCB manufacturing processes, which allows a significant reduction of losses and increased signal quality.
Technical Library | 2014-08-19 15:39:13.0
Understanding warpage of package attach locations on PCBs under reflow temperature conditions is critical in surface mount technology. A new industry standard, IPC 9641, addresses this topic directly for the first time as an international standard.This paper begins by summarizing the sections of the IPC 9641 standard, including, measurement equipment selection, test setup and methodology, and accuracy verification. The paper goes further to discuss practical implementation of the IPC 9641 standards. Key advantages and disadvantages between available warpage measurement methods are highlighted. Choosing the correct measurement technique depends on requirements for warpage resolution, data density, measurement volume, and data correlation. From industry experience, best practice recommendations are made on warpage management of PCB land areas, covering how to setup, run, analyze, and report on local area PCB warpage.The release of IPC 9641 shows that flatness over temperature of the package land area on the PCB is critical to the SMT industry. Furthermore, compatibility of shapes between attaching surfaces in SMT, like a package and PCB, will be critical to product yield and quality in years to come.
Industry News | 2016-02-17 16:31:00.0
Akrometrix LLC will exhibit in Booth #1623 at the 2016 IPC APEX EXPO, scheduled to take place March 15-17, 2016 at the Las Vegas Convention Center. Company representatives will discuss Akrometric’s TherMoire’ AXP modular metrology platform that provides shadow moire’, digital fringe projection and digital image correlation capabilities in one platform. Akrometrix also will demonstrate its new Real-Time Analysis Software along with Array Generation Software (for thermal warpage measurement and partitioning of wafers) and Interface Analysis Software that allows high level and in-depth review of the attachment interface between two surfaces that warp during microelectronics and electronic assembly production reflow processes.
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